Verification Central


How do you Verify the AMBA System Level Environment?

In my previous blog, AMBA based Subsystems: What does it take to verify them?, I had discussed some of the key verification challenges when it comes to verifying complex SOCs based on AMBA based subsystems. It was observed that it would indeed be useful to have an extensible AMBA based verification environment which can be tweaked minimally so that it can be reused for new systems or derivatives.

To enable SOC verification engineers to create highly configurable AMBA fabric, the system environment should provide place-holders for hooking the DUT with any of the quintessential AMBA VIP components such as AXI3/4/ACE, AHB or APB. With the use of AMBA System environment we can configure it to instantiate as many number of AXI/AHB/APB VIP with minimal additional code. Thus, such an environment would need to encapsulate the following among others:

  • CHI system environment
  • AXI (3/4/ACE) system environment
  • AHB system environment
  • APB system environment
  • A virtual sequencer
  • An array of AMBA System Monitors
  • Configuration descriptor of the AMBA system environment which can be used to configure the underlying CHI/AXI/AHB/APB System environment

The figure below shows a representation of such a verification environment:


Let’s see what features in UVM can come in handy for creating a robust environment for some of the important system level capabilities:

  • Layered virtual sequencers to achieve synchronization between various components: A system sequencer which manages synchronization across the bus fabric can be modeled as a virtual sequencer with references to the virtual sequencers within CHI System Env, AXI System Env, AHB System Env and APB System Env.
  • Leveraging Analysis ports for system level checks, score boarding and response handling: Each of the Port Monitors in the CHI, AXI, AHB & APB Master and Slave Agent would ideally have an analysis port. At the end of the transaction, the Master and Slave Agents respectively write the completed transaction object to the analysis port. Such upstream ports and downstream ports can be specified to be used by the system monitor to track transformations and responses across the fabric as well as to perform routing checks.
  •  Using callbacks to enable user extensions and to extract coverage and throughput measurement: Callbacks are an access mechanism that enable the insertion of user-defined code and allow access to objects for performance analysis and throughput measurements in the case of the AMBA system environment.
  • A comprehensive sequence library to be run on the virtual sequencer in the System environment: UVM allows for a logical collection of sequences to be registered to a sequence library and this collection can execute on an associated sequencer. A system level sequencer then coordinates the execution of these collection of sequences across different sequencers to create an interesting mix of scenarios while targeting the maximum coverage for a system level stimulus perspective

From a verification perspective, system level checks are key. As mentioned earlier, they can include:

  •  Data Integrity checks across CHI, AXI, AHB and APB ports
  •  Transaction routing checks across CHI, AXI, AHB and APB ports

In my next blog, I will talk about this aspect in more detail. I would walk you through the capabilities that you would need in your System monitor to easily perform the checks mentioned above.

Authored by Satyapriya Acharya 

Here’s where you can find more information on Verification IP for AMBA 4 AXI.