As Data Center and Artificial Intelligence applications take center stage , last few years have seen the advent of various high bandwidth interconnect technologies. Compute Express Link (CXL), is an aspiring new interconnect technology for high bandwidth devices such as accelerators with memory, high density compute cards, and GPU comprised accelerators. The specification is defined by CXL Consortium https://www.computeexpresslink.org/. Synopsys has developed a comprehensive CXL verification subsystem, being already used by Early Adopters planning to release their first CXL applications. CXL verification subsystem leverages industry popular Synopsys PCI Express Verification IP. Synopsys recently introduced Industry’s first CXL IP solution. For more details refer Synopsys Delivers Industry’s First Compute Express Link (CXL) IP Solution for Breakthrough Performance in Data-Intensive SoCs.
Servers are the core of today’s computational world, processing and storing data on multi-user platforms. Server performance depends on latency and capacity of its memory and storage. In general, DDR-DIMMs (Double Data Rate Dual In-line Memory Modules) are used as server memory, whereas SSDs/HDDs are used as storage in server. Whenever a service request is made to the server, it may require both data processing and storage. In order to execute this service, the processor accesses DDR-DIMMs and SSDs/HDDs. In addition, SSDs/HDDs can be accessed in case of power loss, storing data using backup power sources so data can be retrieved once power is available again.
USB4 is the next generation of the Universal Serial Bus and a major update to the interface in speed and functionality. USB4 has incorporated Thunderbolt 3 capabilities, which extends support of USB interface to existing PCIE, and DisplayPort over the same USB Type-C connector. USB4 doubles the maximum overall throughput from 20Gbps to 40Gbps enabling optimized HD video and data transfer simultaneously. USB4 enables many applications using USB Type-C, which already supports power delivery, USB 3.2, USB 2.0 and other alternative protocols.
Autonomous cars, vehicle communication and infotainment electronic systems are prevalent in today’s automobiles and everyday life. But, what does this mean for SoCs today?
The demand for higher resolution displays is exploding across the market segments from electronics like television, monitors, laptops, and smartphones to the emerging technologies like video and vision, automotive, and AR/VR. The bandwidth requirement for displays increases multi-fold with higher resolution which has been the main driver for development of the latest DisplayPort 2.0 specification by VESA.
Modern computer applications rely heavily on graphics processing and rendering which involve a lot of simultaneous mathematical calculations. A typical CPU is not suitable for jobs that require simultaneous processing, which is why the concept of a dedicated Graphics Processing Unit (GPU) was introduced. The GPU has found its scope not only in graphics processing but also several emerging applications like AI, machine learning, VR, autonomous driving, and network routing.
The semiconductor industry is buzzing with new technologies – Artificial Intelligence (AI), Machine Learning (ML), IoT, Automotive, etc. – bringing a revolution by easing out our day-to-day lives and improving considerably performance, bandwidth and reliable data processing and transfer. Reliability and data integrity are even more important for safety critical verticals where even the slightest error can be catastrophic. Stepping up to meet industry trends, JEDEC recently announced its fifth revision of LPDDR standard JESD209-5 which is all equipped to match the latest bandwidth, power, performance, and reliability trends. Immediately following this, Synopsys announced the Industry’s First LPDDR5 IP & VIP Solution Extending Leadership in DDR5/LPDDR5. Strengthening our leadership in memory VIP, recently we also announced the Industry’s First DDR5 NVDIMM-P Verification IP, showing our continued collaboration with leading memory vendors.
PCI-SIG recently announced the New PCI Express® 5.0 Specification, reaching 32GT/s transfer rates while maintaining low power and backward compatibility with previous technology generations. Aligned with this, Synopsys also announced the collaboration of its Design and Verification Solutions with Astera Labs to Develop Industry’s First PCIe 5.0 Retimer SoC. Emerging applications like AI, cloud, data center, and 5G have been driving the exponential increase in bandwidth requirements and PCIe has evolved to meet these increasing requirements.
We recently published the VIP Newsletter for Apr 2019, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.
The most awaited news of the year is officially here! USB Promoter Group has officially announced USB4 specification, which is an extensive upgrade over USB 3.2 specification. The new specification guarantees double the speed of USB 3.2 Gen 2×2, and has built in Thunderbolt™ 3 compatibility. The official specification release is expected by mid-2019.
A global team of protocol experts that share their insights and technical expertise in the areas of Automotive, DRAM and Flash Memories, Storage, Display, MIPI, AMBA, Ethernet, PCIe, USB and many other bus and interface protocols. This comprehensive team participates in standards committees and will provide the latest information and updates as it relates to your future design considerations.