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Archive for the 'Uncategorized' Category

 

Latest In-depth Technical Articles and Videos on PCIe 5.0, AMBA 5, and CCIX

We recently published the VIP Newsletter for Q4 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on PCIe 5.0, Arm® AMBA® 5 ACE5 and AXI5, CCIX and next generation MIPI and display protocols  and applications ranging from AI, Cloud, Display, Storage and […]

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Posted in ACE, AMBA, Audio, Automotive, AXI, Camera, CCIX, CHI, Data Center, Debug, DesignWare, Display, events, HDCP, HDMI, Interconnects, Interface Subsystems, MIPI, Mobile SoC, MPHY, PCIe, Processor Subsystems, Soundwire, Storage, Test Suites, Uncategorized | Comments Off on Latest In-depth Technical Articles and Videos on PCIe 5.0, AMBA 5, and CCIX

 

A Joint Webinar by Synopsys and NVM Express™ Organization – Virtualization and NVMe

With the rise of cloud computing and large scale data centers, both developers and consumers are demanding for more efficient ways to rapidly access their data. Seeing the advantage of its high performance, the storage industry is quickly adopting the Non-Volatile Memory Express (NVMe) standard. The NVMe™ standard continues to push the storage envelope with […]

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Posted in Data Center, events, NVMe, PCIe, Storage, Uncategorized | Comments Off on A Joint Webinar by Synopsys and NVM Express™ Organization – Virtualization and NVMe

 

Overcoming USB Type-C Verification Challenges

In mid-2014, the USB Type-C standard was announced, which provided a thinner, reversible connector and ever evolving ecosystem of new platforms like MHL, DisplayPort, HDMI, and Thunderbolt over Type-C. USB Type-C is quickly being integrated into most high end and newly-released mid-range smart phones offering the reversible Type-C connector. It is also becoming the connector […]

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Posted in Automotive, Mobile SoC, Type C, Uncategorized, USB | Comments Off on Overcoming USB Type-C Verification Challenges

 

Bye Bye Bottlenecks – Automated SoC Performance Verification is Here!

SoC performance is a key competitive advantage in the marketplace, and the choice and configuration of protocol IP and interconnects is geared towards maximizing said performance. A case in point is the use of HBM (High Bandwidth Memory) technology and memory controllers. Currently in its third generation, HBM boasts of high-performance while using lesser power […]

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Posted in Automotive, Data Center, DDR, DFI, events, HBM, LPDDR, Memory, Uncategorized | Comments Off on Bye Bye Bottlenecks – Automated SoC Performance Verification is Here!

 

Latest Buzz on Next Generation Protocols

We recently published the VIP Newsletter for Jan 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.                     The Q1 2018 edition […]

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Posted in ACE, AMBA, Automotive, AXI, C-PHY, Camera, CHI, CSI, D-PHY, Data Center, DDR, Debug, Flash, Interconnects, LPDDR, Memory, Methodology, MIPI, Mobile SoC, NVMe, PCIe, Processor Subsystems, SPI, Storage, SystemVerilog, Test Suites, Type C, Uncategorized, UVM | Comments Off on Latest Buzz on Next Generation Protocols

 

Arm AMBA 5 AHB5: Accelerating the Embedded and IoT World

Ever since Arm released the Arm® AMBA® 5 AHB5 protocol specifications, questions have arisen among users in the design and verification community—”Why AHB5?”, “What is new in AHB5?” etc. This post initiates a short series of blogs in which we will address these questions and introduce the new features of AMBA 5 AHB5. Why AMBA […]

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Posted in AMBA, Automotive, Interconnects, Processor Subsystems, Uncategorized | Comments Off on Arm AMBA 5 AHB5: Accelerating the Embedded and IoT World

 

Higher Mobile Storage Performance at Lower System Cost

Higher storage performance at a lower cost can create a bottleneck in the design of storage devices.  In order to achieve higher performance, devices must use on chip DRAM, which adds to the overall cost. This is where Unified Memory Extension (UME), a JEDEC specification, comes into the picture. It is defined as extension to […]

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Posted in Automotive, eMMC, Flash, Memory, MIPI, Mobile SoC, ONFi, SPI, Storage, UFS, Uncategorized, Unipro | Comments Off on Higher Mobile Storage Performance at Lower System Cost

 

First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

USB has literally become universal and present in every device ranging from smart phones and personal computers, IoT and wearables, storage and networking, consumer electronics and gaming consoles, automotive and many other emerging verticals. The success of USB can be attributed to innovation with each new generation—the capability to transfer data as well as supply […]

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Posted in Automotive, Data Center, Display, Flash, Mobile SoC, Storage, Type C, Uncategorized | Comments Off on First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

 

HDMI 2.1: Channeling the GenX Audio Video Experience

HDMI (High Definition Multimedia Interface), an audio video interface, has been around for quite some time connecting our TVs, computers, video game consoles, Blu-ray players, cable boxes, etc., to deliver top-quality audio video experience. The arrival of HDMI 2.1 was announced with the promise to deliver faster frame rates, better resolution, greater bandwidth, and a […]

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Posted in Display, HDCP, HDMI, Uncategorized | Comments Off on HDMI 2.1: Channeling the GenX Audio Video Experience

 

Jumping the Barrier of Verifying Arm AMBA ACE Protocol Barrier Transactions

The ordering of memory transactions in Arm® AMBA® protocol is a significant requirement, i.e. the sequence of memory updates/accesses must follow a defined ordering as per the specification. Ordering is important for synchronization events by a processor with respect to retiring load/store instructions. AMBA ACE barrier transactions are used for maintaining the memory ordering across […]

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Posted in ACE, AMBA, CCI400, CHI, Interconnects, Test Suites, Uncategorized | Comments Off on Jumping the Barrier of Verifying Arm AMBA ACE Protocol Barrier Transactions