VIP Central

Archive for the 'Storage' Category

 

First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

USB has literally become universal and present in every device ranging from smart phones and personal computers, IoT and wearables, storage and networking, consumer electronics and gaming consoles, automotive and many other emerging verticals. The success of USB can be attributed to innovation with each new generation—the capability to transfer data as well as supply power for charging devices and ease-of-use with a variety of connectors and form factors.

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Posted in Automotive, Data Center, Display, Flash, Mobile SoC, Storage, Type C, Uncategorized |

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 has doubled the per lane throughput to 16GT/s, compared to 8GT/s for PCIe 3.0, delivering higher performance without increasing the lane width.

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Posted in NVMe, PCIe |

 

SAS 24G: Beyond the 2x Speed

SAS (Serial Attached SCSI) continues to be the interface of choice for mission-critical storage sub-systems. SAS 24G is more than just a 2x speed-bump over previous generation of SAS 12GB, rather it’s a major overhaul of the technology.

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Posted in SAS, SATA, Storage |

 

SAS: A Key Fabric in Storage World

In our previous blog on SAS, we discussed about SAS 24G new encoding and features. In the series of SAS blogs, here we shed some light on other generations of SAS that are still hot in the market.

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Posted in SAS, SATA, Storage, Uncategorized |

 

Next Generation Memory technologies: Ready to take the verification challenges?

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Posted in Data Center, DDR, Debug, DFI, eMMC, events, Flash, HBM, HMC, LPDDR, Memory, ONFi, Storage, UFS |

 

PCIe Gen4 Test Suite with Spec Linking Demo

During the recent PCI-SIG Developers Conference 2016, held in Santa Clara, CA, there was a lot of interest from attendees regarding Synopsys PCIe Gen4 VIP and source code test suite.  One common question that was asked: How do we identify and maintain up to date tests that support the latest PCIe Gen4 specification?

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Posted in Data Center, NVMe, PCIe, Processor Subsystems, Test Suites, Uncategorized |

 

Decoding SAS 24G: New Encoding and Features

SAS follows its own version of Moore’s law, doubling the speed every few years. Keeping up with the tradition, SAS 24G (Gen-5) was recently introduced. Let’s decode, how the effective speed has been doubled to 24G, though signaling rate remains at 22.5G. This has been achieved through a more efficient 128b/150b encoding scheme to realize a usable data rate of 24G while retaining compatibility with 6G and 12G. Additional features were also introduced to improve the overall protocol efficiency. Some of the newly added features include binary primitives, primitive parameters, SMP open priority, inter-expander fairness arbitration enhancements, … etc. In this blog we will look into some of the new features, and will continue to delve into more details in the upcoming blogs on SAS.

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Posted in SAS, SATA, Storage |

 

Evolution of Storage Protocols: SCSI to SAS

Synopsys recently announced the availability of industry’s first VIP to support the Serial-attached SCSI (SAS) 24G standard. Let’s look back how far we have come along, let’s time travel and re-live the interesting journey of storage and SCSI evolution.

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Posted in FC, NVMe, SAS, SATA, Storage |

 

Verification Highlights from DAC 2016

The Design Automation Conference (DAC) 2016 was a great success and here we provide you the highlights of Synopsys’ activities at the event.

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Posted in AMBA, Audio, Automotive, Camera, CAN, Data Center, DDR, Debug, DesignWare, Display, eMMC, Ethernet, Ethernet AVB, Flash, FlexRay, HBM, HMC, Interconnects, Interface Subsystems, LIN, LPDDR, Memory, Methodology, MIPI, Mobile SoC, ONFi, PCIe, Processor Subsystems, Storage, SystemVerilog, Test Suites, UFS, Uncategorized, USB, UVM |

 

Synopsys Verification Continuum at DAC 2016

The Design Automation Conference (DAC) 2016, in Austin, Texas kicks off next week starting June 5th to June 9th. As the leading and longest-running annual design and verification event, DAC is the premier place to network with fellow design and verification engineers.

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Posted in Audio, Automotive, Camera, Data Center, Debug, DesignWare, Display, Ethernet, Interface Subsystems, Methodology, Mobile SoC, PCIe, Processor Subsystems, Storage, Success Stories, SystemVerilog, Test Suites, Uncategorized, UVM |