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Archive for the 'NVMe' Category

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 […]

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Posted in NVMe, PCIe | No Comments »

 

PCIe Gen4 Test Suite with Spec Linking Demo

During the recent PCI-SIG Developers Conference 2016, held in Santa Clara, CA, there was a lot of interest from attendees regarding Synopsys PCIe Gen4 VIP and source code test suite.  One common question that was asked: How do we identify and maintain up to date tests that support the latest PCIe Gen4 specification? Demonstration: The […]

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Posted in Data Center, NVMe, PCIe, Processor Subsystems, Test Suites, Uncategorized | Comments Off on PCIe Gen4 Test Suite with Spec Linking Demo

 

Evolution of Storage Protocols: SCSI to SAS

Synopsys recently announced the availability of industry’s first VIP to support the Serial-attached SCSI (SAS) 24G standard. Let’s look back how far we have come along, let’s time travel and re-live the interesting journey of storage and SCSI evolution. There is no limit to generate, process, store, and restore data in today’s smart and connected […]

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Posted in FC, NVMe, SAS, SATA, Storage | Comments Off on Evolution of Storage Protocols: SCSI to SAS

 

What’s Next in Storage – NVMe VIP?

Have you ever thought on the amount of data the world is producing every day? It runs in quintillions of bytes, and as we are writing this we have added to this ever growing rate of data production. With such an enormous rise in data production, cloud computing and large scale data center developers and […]

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Posted in Data Center, NVMe, PCIe, Storage | Comments Off on What’s Next in Storage – NVMe VIP?

 

NVMe VIP: Verification Features

I ended my last blog post with a more-or-less complete NVMe VIP test-case example, trying to show everything from basic setup to doing an NVM Write followed by a Read. We are going to change gears a bit here, moving from the NVMe commands to some of the VIP features that are available to assist […]

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Posted in Debug, NVMe, PCIe | Comments Off on NVMe VIP: Verification Features

 

Celebrating the Holiday Season with VIPs

The Holiday Season is upon us. As you stand in lines, wait for packages to arrive, keep in mind that Synopsys continues to provide you the highest level of service: support, available protocols and deployment of new titles that you, our current and future VIP customer, deserve. It has been a wonderful year — many […]

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Posted in AMBA, Automotive, C-PHY, CAN, CSI, D-PHY, Data Center, DDR, DesignWare, DFI, Display, DSI, eMMC, Ethernet, Ethernet AVB, Flash, HBM, HDCP, HDMI, HMC, I3C, LPDDR, Memory, Methodology, MIPI, MPHY, NVMe, ONFi, PCIe, SATA, Storage, SystemVerilog, Test Suites, UFS, Unipro, USB | Comments Off on Celebrating the Holiday Season with VIPs

 

NVMe VIP Architecture: Host Features

In my last post, I covered a basic NVMe VIP test-case including some basic setup, sending a command and receiving a completion. Here, we’ll look at a few more NVMe commands, touching on some of the features and capabilities of the VIP. Here’s where you can learn more about Synopsys VC Verification IP for NVMe and for PCIe. […]

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Posted in Methodology, NVMe, PCIe, UVM | Comments Off on NVMe VIP Architecture: Host Features

 

Synopsys NVMe VIP Architecture: The Host Protocol Layers

Our previous post on NVMe was an overview of the NVMe protocol. We will now start looking closer at the VIP-proper, looking initially at the NVMe Host Protocol layers. This will provide an introductory overview of sending commands to the NVMe Controller. Here’s where you can learn more about Synopsys’ VC Verification IP for NVMe and for PCIe. […]

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Posted in Methodology, NVMe, PCIe, UVM | Comments Off on Synopsys NVMe VIP Architecture: The Host Protocol Layers

 

The Synopsys NVMe VIP: A High Level View

Overview NVM Express or the Non-Volatile Memory Host Controller Interface (its prior name was NVMHCI, now shortened to NVMe) is a host-based software interface designed to communicate with Solid State storage devices across a PCIe fabric. The current Synopsys NVMe Verification IP (VIP) is a comprehensive testing vehicle which consists of two main subsystems – […]

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Posted in MPHY, NVMe, PCIe, Storage, SystemVerilog | Comments Off on The Synopsys NVMe VIP: A High Level View