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Archive for the 'Storage' Category

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 […]

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SAS 24G: Beyond the 2x Speed

SAS (Serial Attached SCSI) continues to be the interface of choice for mission-critical storage sub-systems. SAS 24G is more than just a 2x speed-bump over previous generation of SAS 12GB, rather it’s a major overhaul of the technology. In the previous blog – Decoding SAS 24G: New Encoding and Features, we looked at the recently introduced 128b/150b […]

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Posted in SAS, SATA, Storage | No Comments »

 

SAS: A Key Fabric in Storage World

In our previous blog on SAS, we discussed about SAS 24G new encoding and features. In the series of SAS blogs, here we shed some light on other generations of SAS that are still hot in the market. SAS was announced in 2004, supporting data rates till 3Gbps for SAS drives and was compatible with […]

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Next Generation Memory technologies: Ready to take the verification challenges?

Advancement in Memory technologies and the demand for faster and higher density configuration leaves verification engineers in a limbo. The Memory world is debating the next wave of memory protocols and technologies such as Next Generation DDR, HBM, and NVDIMM: DDR: Wishfully the next generation DDR specifications will bring many benefits to computers. With faster and […]

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Posted in Data Center, DDR, Debug, DFI, eMMC, events, Flash, HBM, HMC, LPDDR, Memory, ONFi, Storage, UFS | Comments Off on Next Generation Memory technologies: Ready to take the verification challenges?

 

PCIe Gen4 Test Suite with Spec Linking Demo

During the recent PCI-SIG Developers Conference 2016, held in Santa Clara, CA, there was a lot of interest from attendees regarding Synopsys PCIe Gen4 VIP and source code test suite.  One common question that was asked: How do we identify and maintain up to date tests that support the latest PCIe Gen4 specification? Demonstration: The […]

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Posted in Data Center, NVMe, PCIe, Processor Subsystems, Test Suites, Uncategorized | Comments Off on PCIe Gen4 Test Suite with Spec Linking Demo

 

Decoding SAS 24G: New Encoding and Features

SAS follows its own version of Moore’s law, doubling the speed every few years. Keeping up with the tradition, SAS 24G (Gen-5) was recently introduced. Let’s decode, how the effective speed has been doubled to 24G, though signaling rate remains at 22.5G. This has been achieved through a more efficient 128b/150b encoding scheme to realize […]

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Evolution of Storage Protocols: SCSI to SAS

Synopsys recently announced the availability of industry’s first VIP to support the Serial-attached SCSI (SAS) 24G standard. Let’s look back how far we have come along, let’s time travel and re-live the interesting journey of storage and SCSI evolution. There is no limit to generate, process, store, and restore data in today’s smart and connected […]

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Posted in FC, NVMe, SAS, SATA, Storage | Comments Off on Evolution of Storage Protocols: SCSI to SAS

 

Verification Highlights from DAC 2016

The Design Automation Conference (DAC) 2016 was a great success and here we provide you the highlights of Synopsys’ activities at the event. Synopsys hosted the annual “SoC Leaders Verify with Synopsys” Verification luncheon.  The luncheon featured industry experts and executives from Cavium, NXP, Qualcomm and Samsung, and drove our main messages of collaboration, with […]

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Posted in AMBA, Audio, Automotive, Camera, CAN, Data Center, DDR, Debug, DesignWare, Display, eMMC, Ethernet, Ethernet AVB, Flash, FlexRay, HBM, HMC, Interconects, Interface Subsystems, LIN, LPDDR, Memory, Methodology, MIPI, Mobile SoC, ONFi, PCIe, Processor Subsystems, Storage, SystemVerilog, Test Suites, UFS, Uncategorized, USB, UVM | Comments Off on Verification Highlights from DAC 2016

 

Synopsys Verification Continuum at DAC 2016

The Design Automation Conference (DAC) 2016, in Austin, Texas kicks off next week starting June 5th to June 9th. As the leading and longest-running annual design and verification event, DAC is the premier place to network with fellow design and verification engineers. Synopsys will feature its annual Verification Luncheon and Customer Panel that discusses the […]

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Posted in Audio, Automotive, Camera, Data Center, Debug, DesignWare, Display, Ethernet, Interface Subsystems, Methodology, Mobile SoC, PCIe, Processor Subsystems, Storage, Success Stories, SystemVerilog, Test Suites, Uncategorized, UVM | Comments Off on Synopsys Verification Continuum at DAC 2016

 

Industry’s First SAS 24G Verification IP for Enterprise Storage Systems

How fast do we want to access our data? There is a never ending demand for faster and better storage technologies and SAS-4 24G is the latest addition to this. SAS (Serial-attached SCSI) offers an ideal solution for applications with substantial storage, backup and archiving demands. SAS is widely considered to be the prevalent interface […]

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Posted in SAS, SATA, Storage, Uncategorized | Comments Off on Industry’s First SAS 24G Verification IP for Enterprise Storage Systems