VIP Central

Archive for the 'Memory' Category

 

LPDDR4: What Makes It Faster and Reduces Power Consumption

DRAM memories are the ‘heart’ of any computational device, e.g. smart phones, laptops, servers etc. LPDDR4 was mainly designed to increase memory speed and efficiency for mobile computing devices such as smartphones, tablets, and ultra-thin notebooks.  It supports speeds up to 4267Mbps (double the speed of LPDDR3) and 1.1 V input/output buffer power, along with […]

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Posted in Automotive, Data Center, DDR, DFI, LPDDR, Memory, Mobile SoC | No Comments »

 

Flavors of SPI: Emerging Protocol in Automotive

SPI interface is emerging as a popular choice in automotive applications ranging from sensors, display console, navigation systems, booting through SPI Flash and many more. SPI low pin count and configurable clock rate facilitate the requirements of the emerging automotive applications. Synchronous Serial Peripheral bus (SPI) allows synchronous serial communication between a controller and peripheral […]

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Posted in Automotive, Flash, Memory, SPI | No Comments »

 

Next Generation Memory technologies: Ready to take the verification challenges?

Advancement in Memory technologies and the demand for faster and higher density configuration leaves verification engineers in a limbo. The Memory world is debating the next wave of memory protocols and technologies such as Next Generation DDR, HBM, and NVDIMM: DDR: Wishfully the next generation DDR specifications will bring many benefits to computers. With faster and […]

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Posted in Data Center, DDR, Debug, DFI, eMMC, events, Flash, HBM, HMC, LPDDR, Memory, ONFi, Storage, UFS | Comments Off on Next Generation Memory technologies: Ready to take the verification challenges?

 

eMMC: An Optimal Flash Memory

The two fundamental requirements of every mobile device is speed and power, with the biggest challenge being that both are inversely proportional to each other. One simply cannot have both, because with higher speed comes higher power consumption. With the ever increasing demand for higher resolution graphics and media to enrich the user experience, there […]

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Posted in Automotive, eMMC, Flash, Memory, Mobile SoC, Uncategorized | Comments Off on eMMC: An Optimal Flash Memory

 

DDR-PHY Interoperability Using DFI

The DDR PHY Interface (DFI) is used in several consumer electronics devices including smart phones. DFI is an interface protocol that defines signals, timing, and programmable parameters required to transfer control information and data to and from the DRAM devices, and between MC (Micro Controller) and PHY. DFI is applicable to all DRAM protocols including […]

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Posted in DDR, DFI, LPDDR, Uncategorized | Comments Off on DDR-PHY Interoperability Using DFI

 

UFS – Faster and Secured Flash Storage

In today’s connected world of smart devices, we want to access our data faster and at the same time we want it to be secured and protected from intruders. Flash memories are not only faster but secured and reliable also in its avatar as UFS – Universal Flash Storage. This blog provides an insight into […]

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Posted in Flash, Memory, MIPI, UFS, Unipro | Comments Off on UFS – Faster and Secured Flash Storage

 

Racing Ahead with ONFI 1 to 4: 50 to 800MBps

Flash memory first came into home with external storage devices (e.g. USB memory devices) at very modest capacities of few MB and have reached to hundreds of GB. Now it has become ubiquitous with applications across myriad of devices ranging from smart phones, to IoT, wearable and consumer electronics. With the explosion in applications, many […]

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Posted in Flash, ONFi | Comments Off on Racing Ahead with ONFI 1 to 4: 50 to 800MBps

 

Verification Highlights from DAC 2016

The Design Automation Conference (DAC) 2016 was a great success and here we provide you the highlights of Synopsys’ activities at the event. Synopsys hosted the annual “SoC Leaders Verify with Synopsys” Verification luncheon.  The luncheon featured industry experts and executives from Cavium, NXP, Qualcomm and Samsung, and drove our main messages of collaboration, with […]

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Posted in AMBA, Audio, Automotive, Camera, CAN, Data Center, DDR, Debug, DesignWare, Display, eMMC, Ethernet, Ethernet AVB, Flash, FlexRay, HBM, HMC, Interconects, Interface Subsystems, LIN, LPDDR, Memory, Methodology, MIPI, Mobile SoC, ONFi, PCIe, Processor Subsystems, Storage, SystemVerilog, Test Suites, UFS, Uncategorized, USB, UVM | Comments Off on Verification Highlights from DAC 2016

 

Simplifying Debug of Memory Models

Synopsys VC VIP provides Verdi Protocol Analyzer, a protocol and memory aware debug environment . In my previous blog Debugging Memory Protocols with the Verdi Protocol Analyzer, I discussed the value add for using the Verdi Protocol Analyzer to debug memory protocols easily and efficiently. Also, I described how easy it is to look at a specific command […]

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Posted in DDR, Debug, DFI, Flash, HBM, HMC, LPDDR, Memory, Uncategorized | Comments Off on Simplifying Debug of Memory Models

 

Celebrating the Holiday Season with VIPs

The Holiday Season is upon us. As you stand in lines, wait for packages to arrive, keep in mind that Synopsys continues to provide you the highest level of service: support, available protocols and deployment of new titles that you, our current and future VIP customer, deserve. It has been a wonderful year — many […]

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Posted in AMBA, Automotive, C-PHY, CAN, CSI, D-PHY, Data Center, DDR, DesignWare, DFI, Display, DSI, eMMC, Ethernet, Ethernet AVB, Flash, HBM, HDCP, HDMI, HMC, I3C, LPDDR, Memory, Methodology, MIPI, MPHY, NVMe, ONFi, PCIe, SATA, Storage, SystemVerilog, Test Suites, UFS, Unipro, USB | Comments Off on Celebrating the Holiday Season with VIPs