Verification Central

Archive for the 'AXI' Category

 

Synopsys Introduces the Industry’s First Verification IPs for Arm AMBA 5 AXI-J and APB-E

Arm recently announced the availability of the next iteration of the Arm® AMBA® 5 AXI and APB – AXI Issue J (AXI-J) and APB issue E (APB-E). These new specifications introduce several exciting features related to the latest Arm architecture and optimized transaction flows.

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Posted in AMBA, Arm, AXI

 

Using Synopsys Smart Monitors to Improve System Performance of Your Arm SoCs

Highlights

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Posted in AXI, Uncategorized, ZeBu EP1

 

Get up to Speed with the Latest Arm AMBA AXI5 Features

The Arm® AMBA® 5 AXI protocol specification supports high-performance, high-frequency system designs for communication between manager and subordinate components. AMBA AXI5 protocols extend prior specification generations and add several important performance and scalability features which closely align these protocols to Arm AMBA CHI. Let’s look at some of the features of the AXI5 protocol in detail.

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Posted in AMBA, Arm, AXI

 

Latest In-depth Technical Articles and Videos on PCIe 5.0, AMBA 5, and CCIX

We recently published the VIP Newsletter for Q4 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on PCIe 5.0, Arm® AMBA® 5 ACE5 and AXI5, CCIX and next generation MIPI and display protocols  and applications ranging from AI, Cloud, Display, Storage and Networking. In case you missed the latest buzz on Verification IP, you can read it here.

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Posted in ACE, AMBA, Audio, Automotive, AXI, Camera, CCIX, CHI, Data Center, Debug, DesignWare, Display, events, HDCP, HDMI, Interconnects, Interface Subsystems, MIPI, Mobile SoC, MPHY, PCIe, Processor Subsystems, Soundwire, Storage, Test Suites, Uncategorized

 

Latest Buzz on Next Generation Protocols

We recently published the VIP Newsletter for Jan 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.

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Posted in ACE, AMBA, Automotive, AXI, C-PHY, Camera, CHI, CSI, D-PHY, Data Center, DDR, Debug, Flash, Interconnects, LPDDR, Memory, Methodology, MIPI, Mobile SoC, NVMe, PCIe, Processor Subsystems, SPI, Storage, SystemVerilog, Test Suites, Type C, Uncategorized, UVM

 

Industry’s First Source Code Test Suite and Verification IP for Arm AMBA ACE5 and AXI5 Enables Early Adopter Success

Synopsys offers a broad set of verification solutions for next generation Arm® AMBA® protocols, including AMBA CHI Issue B, and verification automation solutions including Auto SoC Testbench Generation and AutoPerformance for AMBA protocols, which designers have widely adopted and achieved numerous tape-out successes. We continue the rapid expansion of Synopsys’ verification solutions for AMBA protocols and strengthen our leadership with our latest offering of source code test suites and VIP for AMBA ACE5 and AXI5, which are already in use by early adopters of the new specifications.

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Posted in ACE, AMBA, AXI, CHI, Interconnects, Test Suites