VIP Central

Archive for the 'Display' Category

 

Latest In-depth Technical Articles and Videos on PCIe 5.0, AMBA 5, and CCIX

We recently published the VIP Newsletter for Q4 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on PCIe 5.0, Arm® AMBA® 5 ACE5 and AXI5, CCIX and next generation MIPI and display protocols  and applications ranging from AI, Cloud, Display, Storage and Networking. In case you missed the latest buzz on Verification IP, you can read it here.

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Posted in ACE, AMBA, Audio, Automotive, AXI, Camera, CCIX, CHI, Data Center, Debug, DesignWare, Display, events, HDCP, HDMI, Interconnects, Interface Subsystems, MIPI, Mobile SoC, MPHY, PCIe, Processor Subsystems, Soundwire, Storage, Test Suites, Uncategorized

 

HDMI: How Scrambling Enables Higher Data Rates

HDMI 2.1/2.0 bring significant improvements over previous versions in terms of speed, data integrity, and mode of data transmission. For more details on how HDMI has evolved, read our previous blog – HDMI 1.4 to 2.1: How it Became the Most Popular Display Interface.

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Posted in Automotive, Display, DSC, HDCP, HDMI, Mobile SoC

 

High Resolution Displays for Mobile, TV, PC and Automotive Enabled by DSC 1.2 in HDMI 2.1

DSC has enabled the use of high resolution displays in televisions, PC monitors, mobiles, and automotive infotainment systems. It provides a high quality, low latency algorithm to resolve the bottleneck of high bandwidth requirements needed to support the high resolution.

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Posted in Automotive, Display, DisplayPort, DSC, HDMI, Mobile SoC

 

Trending Articles on DFI 5.0 for DDR5/LPDDR5, NVMe 1.3, USB 3.2, and PCIe 5.0

We recently published the VIP Newsletter for Q3 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on DFI 5.0 for DDR5/LPDDR5, NVMe 1.3, USB 3.2, PCIe 5.0, next generation gaming displays, MIPI CSI-2 v2.1 for Automotive and IoT, and Verdi performance analyzer and protocol debug. In case you missed the latest buzz on Verification IP, you can read it here.

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Posted in Automotive, Camera, CSI, Data Center, DDR, Debug, DFI, Display, DisplayPort, DSC, events, Flash, HDMI, LPDDR, Memory, MIPI, Mobile SoC, NVMe, PCIe, Storage, Test Suites, ToggleNAND, USB

 

The Future of Gaming Displays

The HDMI forum officially released HDMI 2.1 in November, 2017. Gamers around the world saw a new ray of hope in the new features announced in the latest specification – “Enhanced refresh rate features ensure an added level of smooth and seamless motion and transitions for gaming, movies and video” (Ref: HDMI Forum releases v2.1 of the HDMI specification).  These features include Variable Refresh Rate (VRR), Quick Mode Switching (QMS), and Quick Frame Transport (QMT).

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Posted in Display, DSC, HDCP, HDMI

 

Accelerate Debug Productivity of Complex Serial Protocols

Debugging the complex serial protocols is the biggest challenge verification engineers face. It’s one of the most time and effort consuming activity affecting the schedule of every project. Traditional debug methodologies use a combination of loosely connected waveforms, log files, messages, and documentation, which are insufficient for productive debugging. Debugging SoC and block level issues using log files is tedious and time consuming. Design problems that appear in the later phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk.

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Posted in Automotive, Debug, Display, Mobile SoC, Type C, USB

 

10K Resolution at 120Hz Display: A Reality Today with DSC 1.2 in HDMI 2.1

With the arrival of HDMI 2.1 comes an array of remarkable features including the capability to support up to 10K resolutions at 120Hz. Such high resolutions are supported for a wider range of display applications such as externally connected displays (i.e. PC monitors and televisions), embedded display interfaces within mobile systems, and automotive infotainment systems. But with higher resolutions comes the requirement for higher bandwidth.

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Posted in Automotive, Display, DisplayPort, DSC, HDMI, Mobile SoC

 

Saving Power in Displays for Mobile and Consumer Electronics Applications

Higher performance at lower power is the most critical requirement of SoC designs, specifically those targeted towards mobile and consumer electronics applications. VESA (Video Electronics Standards Association), the technical standards organization for computer display standards, came up with a new power saving feature called PSR (Panel Self Refresh) in eDP 1.3. It is also available as an optional feature in DisplayPort. PSR helps to extend battery life in mobile phones, notebooks, and tablets, and is quickly being adopted in high-end designs.

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Posted in Automotive, Display, DisplayPort, HDMI, Interface Subsystems, Mobile SoC

 

HDMI 2.1: How it Became the Most Popular Display Interface

HDMI (High-Definition Multimedia Interface) is a proprietary audio/video interface for transferring uncompressed video data and compressed or uncompressed digital audio data from an HDMI-compliant source device, such as a display controller, to a compatible computer monitor, video projector, digital television, or digital audio device. HDMI is a digital replacement for analog video standards, represented using one of several luminance/color-difference color spaces. We introduced HDMI 2.1 in our previous blog – HDMI 2.1: Channeling the GenX Audio Video Experience. In this blog we will discuss about evolution and key features of HDMI from v1.4 to v2.1.

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Posted in Display, HDCP, HDMI, Mobile SoC

 

LPDDR5: Enhancements in Bandwidth, Reliability, and Power for IoT, AI, and Image Processing

New applications like Cloud Computing, Artificial Intelligence, Autonomous cars, Augmented reality, Embedded vision are driving stricter requirements around memory performance and power efficiency.  Memory is central to these systems, that require high bandwidth and speed along with lower power and lower cost. With these emerging market needs, the memory industry started to move from planar (2D) DRAMs to wide I/O or a 3D technology TSVs (Through Silicon Vertical interconnect access) such as HBM (high bandwidth memory). For more insight on HBM, read our blog “Next Generation Memory Technology for Graphics, Networking and HPC.”  Low Power DRAM technology, evolved to the fifth-generation(LPDDR5) to deliver significant reduction in power and extremely high bandwidth as compared to LPDDR4. In this blog, we discuss LPDDR5 new features based on our understanding from collaboration with memory vendors and early adopters of Synopsys VIP over last 2 years.

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Posted in Automotive, Camera, DDR, DFI, Display, HBM, HMC, LPDDR, Memory, Mobile SoC