VIP Central

Archive for the 'HDMI' Category

 

HDMI 2.1: Channeling the GenX Audio Video Experience

HDMI (High Definition Multimedia Interface), an audio video interface, has been around for quite some time connecting our TVs, computers, video game consoles, Blu-ray players, cable boxes, etc., to deliver top-quality audio video experience.

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Posted in Display, HDCP, HDMI, Uncategorized |

 

Celebrating the Holiday Season with VIPs

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Posted in AMBA, Automotive, C-PHY, CAN, CSI, D-PHY, Data Center, DDR, DesignWare, DFI, Display, DSI, eMMC, Ethernet, Ethernet AVB, Flash, HBM, HDCP, HDMI, HMC, I3C, LPDDR, Memory, Methodology, MIPI, MPHY, NVMe, ONFi, PCIe, SATA, Storage, SystemVerilog, Test Suites, UFS, Unipro, USB |

 

Bernie DeLay @ EDACafe on the Value of SystemVerilog, UVM-based VIP

Here, Synopsys R&D Director, Bernie DeLay, talks to EDACafe on the value of native SystemVerilog and UVM support in our VIP titles. He describes how our memory and protocol VIP have been built debug-friendly with Protocol Analyzer, and support constraint random verification for full functional coverage with back-annotation to executable verification plans.

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Posted in AMBA, DDR, Debug, DesignWare, Ethernet, HDMI, LPDDR, Memory, Methodology, PCIe, SystemVerilog, Test Suites, USB, UVM |

 

HDCP 2.2: Locality Check, SKE and Authentication with Repeaters

In The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and Key Exchange (AKE). AKE is the first step in the authentication protocol. Here we will continue exploring the next 3 steps of the protocol: Locality Check, Session Key Exchange (SKE) and Authentication with repeater. You can learn more about the HDCP 2.2 Authentication Process by downloading our whitepaper, Demystifying the HDCP 2.2 Authentication Process. Locality Check This is an interesting checking mechanism introduced in HDCP2.X to ensure that the receiver and the transmitter are placed nearby. It prohibits sharing of HDCP2.2 protected content over a long distance.

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Posted in HDCP, HDMI, Methodology |

 

HDCP 2.2: Authentication and Key Exchange (AKE)

In The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and key exchange. In HDCP 2.2 Authentication: RSA Cryptography, we discussed the basics of RSA Cryptography. In this blog post, we will dive into the details of Authentication and Key Exchange (AKE), which is the first step in the authentication protocol. You can learn more about the HDCP 2.2 Authentication Process by downloading our whitepaper, Demystifying the HDCP 2.2 Authentication Process.

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Posted in HDCP, HDMI, Methodology |

 

HDCP 2.2 Authentication: RSA Cryptography

In the blog post, The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and key exchange.

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Posted in HDCP, HDMI, Methodology |

 

The HDCP 2.2 Authentication Process – an Introduction

When digital content is transmitted, it is susceptible to unauthorized copying and interceptions. Hence protecting content has become an important factor in the transmission of audiovisual content. In 2003, Intel developed an encryption technique called the High-bandwidth Digital Content Protection (HDCP) protocol to protect audio and video data between a transmitter (transmitting the audio visual content such as a Blu-ray player) and a receiver such as a Monitor. If a transmitting device is transmitting the content HDCP protected then the receiver must also support HDCP in order to receive the content correctly.

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Posted in HDCP, HDMI, Methodology |

 

Freescale and Xilinx Engineers: Managing SoC Verification Complexity

At DVCon 2015, a couple of our key customers shared their viewpoints on how they manage growing verification complexity. This video begins with Michael Sanie highlighting the Synopsys Verification Continuum, and several key technologies that currently address the industry’s need to “Shift-Left” for faster time-to-market. Later, Amol Bhinge of Freescale and Prashanth Gurunath of Xilinx share how their leading SoC design teams have achieved success by collaborating with Synopsys.

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Posted in AMBA, Audio, Camera, DDR, Debug, DesignWare, Display, HDMI, Interface Subsystems, LPDDR, Methodology, MIPI, Mobile SoC, PCIe, SystemVerilog, Test Suites, USB, UVM |