VIP Central

Archive for the 'HDMI' Category

 

Celebrating the Holiday Season with VIPs

The Holiday Season is upon us. As you stand in lines, wait for packages to arrive, keep in mind that Synopsys continues to provide you the highest level of service: support, available protocols and deployment of new titles that you, our current and future VIP customer, deserve. It has been a wonderful year — many […]

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Posted in AMBA, Automotive, C-PHY, CAN, CSI, D-PHY, Data Center, DDR, DesignWare, DFI, Display, DSI, eMMC, Ethernet, Ethernet AVB, Flash, HBM, HDCP, HDMI, HMC, I3C, LPDDR, Memory, Methodology, MIPI, MPHY, NVMe, ONFi, PCIe, SATA, Storage, SystemVerilog, Test Suites, UFS, Unipro, USB | Comments Off on Celebrating the Holiday Season with VIPs

 

Bernie DeLay @ EDACafe on the Value of SystemVerilog, UVM-based VIP

Here, Synopsys R&D Director, Bernie DeLay, talks to EDACafe on the value of native SystemVerilog and UVM support in our VIP titles. He describes how our memory and protocol VIP have been built debug-friendly with Protocol Analyzer, and support constraint random verification for full functional coverage with back-annotation to executable verification plans. You can learn more […]

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Posted in AMBA, DDR, Debug, DesignWare, Ethernet, HDMI, LPDDR, Memory, Methodology, PCIe, SystemVerilog, Test Suites, USB, UVM | Comments Off on Bernie DeLay @ EDACafe on the Value of SystemVerilog, UVM-based VIP

 

HDCP 2.2: Locality Check, SKE and Authentication with Repeaters

In The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and Key Exchange (AKE). AKE is the first step in the authentication protocol. Here we will continue exploring the […]

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Posted in HDCP, HDMI, Methodology | Comments Off on HDCP 2.2: Locality Check, SKE and Authentication with Repeaters

 

HDCP 2.2: Authentication and Key Exchange (AKE)

In The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and key exchange. In HDCP 2.2 Authentication: RSA Cryptography, we discussed the basics of RSA Cryptography. […]

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Posted in HDCP, HDMI, Methodology | Comments Off on HDCP 2.2: Authentication and Key Exchange (AKE)

 

HDCP 2.2 Authentication: RSA Cryptography

In the blog post, The HDCP 2.2 Authentication Process – an Introduction, we discussed why we need HDCP, and the basic steps of the HDCP Authentication Process. We noted that an advanced version of RSA is the underlying cryptography standard used during the Authentication and key exchange. Here, we will discuss the basics of RSA cryptography. You can learn […]

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Posted in HDCP, HDMI, Methodology | Comments Off on HDCP 2.2 Authentication: RSA Cryptography

 

The HDCP 2.2 Authentication Process – an Introduction

When digital content is transmitted, it is susceptible to unauthorized copying and interceptions. Hence protecting content has become an important factor in the transmission of audiovisual content. In 2003, Intel developed an encryption technique called the High-bandwidth Digital Content Protection (HDCP) protocol to protect audio and video data between a transmitter (transmitting the audio visual […]

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Posted in HDCP, HDMI, Methodology | Comments Off on The HDCP 2.2 Authentication Process – an Introduction

 

Freescale and Xilinx Engineers: Managing SoC Verification Complexity

At DVCon 2015, a couple of our key customers shared their viewpoints on how they manage growing verification complexity. This video begins with Michael Sanie highlighting the Synopsys Verification Continuum, and several key technologies that currently address the industry’s need to “Shift-Left” for faster time-to-market. Later, Amol Bhinge of Freescale and Prashanth Gurunath of Xilinx […]

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Posted in AMBA, Audio, Camera, DDR, Debug, DesignWare, Display, HDMI, Interface Subsystems, LPDDR, Methodology, MIPI, Mobile SoC, PCIe, SystemVerilog, Test Suites, USB, UVM | Comments Off on Freescale and Xilinx Engineers: Managing SoC Verification Complexity