The demand for higher resolution displays is exploding across the market segments from electronics like television, monitors, laptops, and smartphones to the emerging technologies like video and vision, automotive, and AR/VR. The bandwidth requirement for displays increases multi-fold with higher resolution which has been the main driver for development of the latest DisplayPort 2.0 specification by VESA.
High resolution 8k UHD displays for emerging technologies like connected cars, IoT, and AR/VR (Augmented/Virtual Reality) require high bandwidth to support the high-resolution transmission. MIPI DSI is the widely used display interface, but the bandwidth provided by PHY layers isn’t sufficient enough to support the high-resolution displays; therefore, a compression technique like DSC (Display Stream Compression) is required. One of our recent blog discussed about DSC 1.2 in HDMI 2.1 – High Resolution Displays for Mobile, TV, PC and Automotive Enabled by DSC 1.2 in HDMI 2.1. In this blog, we will see how DSC 1.2 enables MIPI DSI to support the high-resolution displays for emerging applications.
The latest buzzword in the world of TVs and smartphones is High Dynamic Range (HDR). Many of us might already know that an HDR TV improves the viewing experience by offering better picture quality, just like people who use the latest smartphones know that turning on the HDR mode in the camera helps in capturing more lively pictures. In November 2017, the HDMI forum officially released HDMI 2.1 adding more to our joy, by offering the new and improved HDR. The announcement goes on to say “Dynamic HDR support ensures every moment of a video is displayed at its ideal values for depth, detail, brightness, contrast and wider color gamuts—on a scene-by-scene or even a frame-by-frame basis”. Before we explore HDR and Dynamic HDR in detail, let’s first understand how Standard Dynamic Range (SDR) works.
We recently published the VIP Newsletter for Q4 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on PCIe 5.0, Arm® AMBA® 5 ACE5 and AXI5, CCIX and next generation MIPI and display protocols and applications ranging from AI, Cloud, Display, Storage and Networking. In case you missed the latest buzz on Verification IP, you can read it here.
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HDMI 2.1/2.0 bring significant improvements over previous versions in terms of speed, data integrity, and mode of data transmission. For more details on how HDMI has evolved, read our previous blog – HDMI 1.4 to 2.1: How it Became the Most Popular Display Interface.
DSC has enabled the use of high resolution displays in televisions, PC monitors, mobiles, and automotive infotainment systems. It provides a high quality, low latency algorithm to resolve the bottleneck of high bandwidth requirements needed to support the high resolution.
We recently published the VIP Newsletter for Q3 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. The newsletter covers content on DFI 5.0 for DDR5/LPDDR5, NVMe 1.3, USB 3.2, PCIe 5.0, next generation gaming displays, MIPI CSI-2 v2.1 for Automotive and IoT, and Verdi performance analyzer and protocol debug. In case you missed the latest buzz on Verification IP, you can read it here.
The HDMI forum officially released HDMI 2.1 in November, 2017. Gamers around the world saw a new ray of hope in the new features announced in the latest specification – “Enhanced refresh rate features ensure an added level of smooth and seamless motion and transitions for gaming, movies and video” (Ref: HDMI Forum releases v2.1 of the HDMI specification). These features include Variable Refresh Rate (VRR), Quick Mode Switching (QMS), and Quick Frame Transport (QMT).
Debugging the complex serial protocols is the biggest challenge verification engineers face. It’s one of the most time and effort consuming activity affecting the schedule of every project. Traditional debug methodologies use a combination of loosely connected waveforms, log files, messages, and documentation, which are insufficient for productive debugging. Debugging SoC and block level issues using log files is tedious and time consuming. Design problems that appear in the later phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk.
With the arrival of HDMI 2.1 comes an array of remarkable features including the capability to support up to 10K resolutions at 120Hz. Such high resolutions are supported for a wider range of display applications such as externally connected displays (i.e. PC monitors and televisions), embedded display interfaces within mobile systems, and automotive infotainment systems. But with higher resolutions comes the requirement for higher bandwidth.