In today’s world of smartphones and tablets, high speed data at low power consumption is becoming increasingly important. MIPI M-PHY supports multiple applications with high data bandwidth and low power consumption which makes it a popular specification for mobile devices. Applications like JEDEC UFS 3.0 and MIPI UniPro 1.8 now support MIPI M-PHY 4.1 which provides high speed data at a rate of nearly 11Gbps (HS_G4). To learn more about latest UFS and UniPro specifications read our previous blog “High Speed Memory in Smart Phones: MIPI UniPro v1.8 for JEDEC UFS v3.0”. Data at such a high speed can lead to inter-symbol-interference (ISI). M-PHY provides a safety measure to prevent the loss of data at HS_G4. In this blog, we are going to talk about the ‘ADAPT’ feature and its advantages which were introduced in M-PHY 4.0.
This year, MIPI DevCon was held in Bangalore, India and Hsinchu City, Taiwan in October. Synopsys MIPI protocol experts hosted several demos at each conference showcasing implementation experiences, use cases and application examples within mobile, automotive, IoT and mixed reality applications.
Higher storage performance at a lower cost can create a bottleneck in the design of storage devices. In order to achieve higher performance, devices must use on chip DRAM, which adds to the overall cost. This is where Unified Memory Extension (UME), a JEDEC specification, comes into the picture. It is defined as extension to the JEDEC UFS (Universal Flash Storage) specification. JEDEC UFS device uses NAND flash technology for data storage. Unified Memory (UM) allows users to use part of the host memory as the device’s internal memory. Since the host memory is already available in large capacities, this mechanism provides a much bigger space for the device to use as a Write Buffer (WB) cache or to store information such as Logical to Physical (L2P) address translation tables. The UM area is physically located on the host side but ultimately belongs to the device, thereby replacing the device-integrated RAM, and reducing overall cost. Large space availability means the device can store larger amounts of WB of L2P table information resulting in higher storage performance.
If you are currently using or consider using JEDEC UFS protocol in your next design you might face several verification challenges. The following blog will talk about 7 of the biggest challenges of UFS stack verification. With the fact that people are moving to reduced pin count and increased speed, an MPHY based stack has picked up momentum and provides an increased number of new applications to leverage the UFS stack. The UFS protocol is being adopted rapidly due to its higher performance, efficiency, concurrent multi-tasking, usage of the complete band width, security, and reliability and longer power life.
MIPI DevCon 2016 was successfully held at Mountain View, California on 14-15th Sep, 2016. Synopsys MIPI protocol experts were there demonstrating our MIPI design and verification solutions for wide spectrum of markets ranging from IoT, to mobile, automotive, and consumer. During the conference Synopsys had several presentations. One of the papers presented by Synopsys was based on a customer case study that provide an overview and successful adoption of the MIPI SoundWire VIP and Test Suites to achieve comprehensive verification and coverage closure on their latest MIPI design.
In today’s connected world of smart devices, we want to access our data faster and at the same time we want it to be secured and protected from intruders. Flash memories are not only faster but secured and reliable also in its avatar as UFS – Universal Flash Storage. This blog provides an insight into various security modes of UFS devices and how to access them. It also points out how encryption is used to secure the data further.
Getting the best out of available battery technologies continues to be a challenge for mobile design companies. When phones were used for voice only, the battery lasted a few days compared to less than a day in case of smartphones with high resolution screens, cameras, powerful processors, gigabytes of memories and running power hungry software. Consumers continuously demand more features and functions from their mobile electronics and with more functions converged into a single device, it’s becoming extremely challenging for SoC designs to keep up with the exploding bandwidth, advanced integration functionality and low power constraints.
Mobile phone market is very competitive and time to market is very critical for mobile system designs. It becomes important that the IP design and verification cycle is continuously optimized. MIPI UniPro is a layered protocol for interconnecting devices within a mobile system and allowing them to exchange information at high-data rates. JEDEC UFS and MIPI CSI-3 are the typical applications defined on top of UniPro stack. UniPro specification defines a set of standard signaling at application and physical layers that allows the development and verification of individual IP blocks in parallel. In this blog, I would describe various verification topologies possible in a UniPro design and stack based architecture of Synopsys UniPro VIP.
Posted in AMBA, Automotive, C-PHY, CAN, CSI, D-PHY, Data Center, DDR, DesignWare, DFI, Display, DSI, eMMC, Ethernet, Ethernet AVB, Flash, HBM, HDCP, HDMI, HMC, I3C, LPDDR, Memory, Methodology, MIPI, MPHY, NVMe, ONFi, PCIe, SATA, Storage, SystemVerilog, Test Suites, UFS, Unipro, USB |
MIPI UniPro is a recent addition to mobile chip-to-chip interconnect technology. It’s got many useful features to meet the requirements of mobile applications. That’s perhaps why Google’s Project Ara has selected MIPI UniPro and MIPI M-PHY as its backbone interconnects.