Higher storage performance at a lower cost can create a bottleneck in the design of storage devices. In order to achieve higher performance, devices must use on chip DRAM, which adds to the overall cost. This is where Unified Memory Extension (UME), a JEDEC specification, comes into the picture. It is defined as extension to the JEDEC UFS (Universal Flash Storage) specification. JEDEC UFS device uses NAND flash technology for data storage. Unified Memory (UM) allows users to use part of the host memory as the device’s internal memory. Since the host memory is already available in large capacities, this mechanism provides a much bigger space for the device to use as a Write Buffer (WB) cache or to store information such as Logical to Physical (L2P) address translation tables. The UM area is physically located on the host side but ultimately belongs to the device, thereby replacing the device-integrated RAM, and reducing overall cost. Large space availability means the device can store larger amounts of WB of L2P table information resulting in higher storage performance.
MIPI Camera Serial Interface (CSI-2) is widely used as a camera interface in the mobile industry. MIPI Alliance is constantly working towards providing a solution to cater the increasing demand for higher-bandwidth and high-definition video like 1080p, 4K, and 8K. The MIPI Working Group released CSI-2 v2.0 to target emerging imaging and vision applications. It has extended the usages of CSI-2 to IoT, wearable devices, drones, Virtual Reality (VR) and Augmented Reality (AR), and automotive systems.
If you are currently using or consider using JEDEC UFS protocol in your next design you might face several verification challenges. The following blog will talk about 7 of the biggest challenges of UFS stack verification. With the fact that people are moving to reduced pin count and increased speed, an MPHY based stack has picked up momentum and provides an increased number of new applications to leverage the UFS stack. The UFS protocol is being adopted rapidly due to its higher performance, efficiency, concurrent multi-tasking, usage of the complete band width, security, and reliability and longer power life.
MIPI DevCon 2016 was successfully held at Mountain View, California on 14-15th Sep, 2016. Synopsys MIPI protocol experts were there demonstrating our MIPI design and verification solutions for wide spectrum of markets ranging from IoT, to mobile, automotive, and consumer. During the conference Synopsys had several presentations. One of the papers presented by Synopsys was based on a customer case study that provide an overview and successful adoption of the MIPI SoundWire VIP and Test Suites to achieve comprehensive verification and coverage closure on their latest MIPI design.
In today’s connected world of smart devices, we want to access our data faster and at the same time we want it to be secured and protected from intruders. Flash memories are not only faster but secured and reliable also in its avatar as UFS – Universal Flash Storage. This blog provides an insight into various security modes of UFS devices and how to access them. It also points out how encryption is used to secure the data further.
Getting the best out of available battery technologies continues to be a challenge for mobile design companies. When phones were used for voice only, the battery lasted a few days compared to less than a day in case of smartphones with high resolution screens, cameras, powerful processors, gigabytes of memories and running power hungry software. Consumers continuously demand more features and functions from their mobile electronics and with more functions converged into a single device, it’s becoming extremely challenging for SoC designs to keep up with the exploding bandwidth, advanced integration functionality and low power constraints.
The Design Automation Conference (DAC) 2016 was a great success and here we provide you the highlights of Synopsys’ activities at the event.
Posted in AMBA, Audio, Automotive, Camera, CAN, Data Center, DDR, Debug, DesignWare, Display, eMMC, Ethernet, Ethernet AVB, Flash, FlexRay, HBM, HMC, Interconnects, Interface Subsystems, LIN, LPDDR, Memory, Methodology, MIPI, Mobile SoC, ONFi, PCIe, Processor Subsystems, Storage, SystemVerilog, Test Suites, UFS, Uncategorized, USB, UVM |
The Design Automation Conference (DAC) 2016, in Austin, Texas kicks off next week starting June 5th to June 9th. As the leading and longest-running annual design and verification event, DAC is the premier place to network with fellow design and verification engineers.
Posted in Audio, Automotive, Camera, Data Center, Debug, DesignWare, Display, Ethernet, Interface Subsystems, Methodology, Mobile SoC, PCIe, Processor Subsystems, Storage, Success Stories, SystemVerilog, Test Suites, Uncategorized, UVM |
We are capturing our memories in high-definition with the latest multi-megapixel cameras and playing back with the high resolution displays. This has led to a tremendous increase in data transfer and bandwidth requirements between peripherals and application processor in a mobile SoC. It’s challenging to support advanced multimedia features in the mobile phones by integrating megapixel cameras and superior resolution displays at a reduced cost and power consumption.
Mobile phone market is very competitive and time to market is very critical for mobile system designs. It becomes important that the IP design and verification cycle is continuously optimized. MIPI UniPro is a layered protocol for interconnecting devices within a mobile system and allowing them to exchange information at high-data rates. JEDEC UFS and MIPI CSI-3 are the typical applications defined on top of UniPro stack. UniPro specification defines a set of standard signaling at application and physical layers that allows the development and verification of individual IP blocks in parallel. In this blog, I would describe various verification topologies possible in a UniPro design and stack based architecture of Synopsys UniPro VIP.