VIP Central

Archive for the 'Mobile SoC' Category


Jumping the Barrier of Verifying AMBA ACE Barrier Transactions

The ordering of memory transactions in AMBA protocol is a significant requirement, i.e. the sequence of memory updates/accesses must follow a defined ordering as per the specification. Ordering is important for synchronization events by a processor with respect to retiring load/store instructions. AMBA ACE barrier transactions are used for maintaining the memory ordering across a […]

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Posted in ACE, AMBA, CCI400, CHI, Interconects, Test Suites, Uncategorized | No Comments »


Industry’s First DisplayPort 1.4 with DSC 1.2 VIP and Test Suite

Every hot selling multimedia device today has enviable specifications, but the first thing the user experiences is the display quality. Displays are coming closer to our natural vision by every passing day, thanks to the increasing resolution, and color depths. UHD displays with 4k resolution are being adopted rapidly, and demand for even higher 8k […]

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Posted in Display, DisplayPort | Comments Off on Industry’s First DisplayPort 1.4 with DSC 1.2 VIP and Test Suite


How to Address the Top 7 JEDEC-UFS Stack Verification Challenges Using Test Suites

If you are currently using or consider using JEDEC UFS protocol in your next design you might face several verification challenges.  The following blog will talk about 7 of the biggest challenges of UFS stack verification. With the fact that people are moving to reduced pin count and increased speed, an MPHY based stack has […]

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Posted in Mobile SoC, MPHY, UFS, Unipro | Comments Off on How to Address the Top 7 JEDEC-UFS Stack Verification Challenges Using Test Suites


MIPI I3C: A unified sensor interface

Sensors are everywhere surrounding us at home, office, cars, industry and everything else we are using today. It all started with the thermostat and first motion sensor used for an alarm system invented somewhere in 1950s. Over the period of time, rapid increase of sensors used across various applications created significant challenges, there was a need […]

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Posted in I3C, MIPI, Uncategorized | Comments Off on MIPI I3C: A unified sensor interface


Next Generation Memory technologies: Ready to take the verification challenges?

Advancement in Memory technologies and the demand for faster and higher density configuration leaves verification engineers in a limbo. The Memory world is debating the next wave of memory protocols and technologies such as Next Generation DDR, HBM, and NVDIMM: DDR: Wishfully the next generation DDR specifications will bring many benefits to computers. With faster and […]

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Posted in Data Center, DDR, Debug, DFI, eMMC, events, Flash, HBM, HMC, LPDDR, Memory, ONFi, Storage, UFS | Comments Off on Next Generation Memory technologies: Ready to take the verification challenges?


eMMC: An Optimal Flash Memory

The two fundamental requirements of every mobile device is speed and power, with the biggest challenge being that both are inversely proportional to each other. One simply cannot have both, because with higher speed comes higher power consumption. With the ever increasing demand for higher resolution graphics and media to enrich the user experience, there […]

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Posted in Automotive, eMMC, Flash, Memory, Mobile SoC, Uncategorized | Comments Off on eMMC: An Optimal Flash Memory


MIPI DevCon 2016: SoundWire VIP

MIPI DevCon 2016 was successfully held at Mountain View, California on 14-15th Sep, 2016. Synopsys MIPI protocol experts were there demonstrating our MIPI design and verification solutions for wide spectrum of markets ranging from IoT, to mobile, automotive, and consumer. During the conference Synopsys had several presentations.  One of the papers presented by Synopsys was […]

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Posted in Audio, Automotive, C-PHY, Camera, CSI, D-PHY, events, I2S, I3C, Interface Subsystems, MIPI, Mobile SoC, MPHY, SilmBus, Soundwire, Test Suites, UFS, Unipro | Comments Off on MIPI DevCon 2016: SoundWire VIP


DDR-PHY Interoperability Using DFI

The DDR PHY Interface (DFI) is used in several consumer electronics devices including smart phones. DFI is an interface protocol that defines signals, timing, and programmable parameters required to transfer control information and data to and from the DRAM devices, and between MC (Micro Controller) and PHY. DFI is applicable to all DRAM protocols including […]

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Posted in DDR, DFI, LPDDR, Uncategorized | Comments Off on DDR-PHY Interoperability Using DFI


UFS – Faster and Secured Flash Storage

In today’s connected world of smart devices, we want to access our data faster and at the same time we want it to be secured and protected from intruders. Flash memories are not only faster but secured and reliable also in its avatar as UFS – Universal Flash Storage. This blog provides an insight into […]

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Posted in Flash, Memory, MIPI, UFS, Unipro | Comments Off on UFS – Faster and Secured Flash Storage


AMBA AXI Exclusive Access De-mystified

AMBA AXI exclusive access may look simple at first glance, but as we delve deeper into it, we find the different flavors of exclusive access. The possibility of these different scenarios and combinations poses a tough challenge in verifying the critical feature in AMBA-based designs. This blog primarily focusses on exclusive access in AMBA AXI3, […]

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Posted in AMBA, CCI400, Interconects, NOC, Test Suites, Uncategorized | 1 Comment »