In this video, Synopsys Applications Consultant, Vijay Akkaraju, describes the evolving Storage ecosystem, the challenges of verifying storage protocol based system, and how Synopsys’ SATA Verification IP can support you in verifying and debugging your designs efficiently and effectively.
In a recent post, Paul Graykowski introduced Synopsys VIP for PCIe Gen4.
Here, Paul Graykowski, Corporate Applications Engineer at Synopsys, describes what our Verification IP for PCIe Gen4 can do for you.
In this video, you will learn how to increase productivity with Synopsys Memory VIP.
Featuring speakers from Altera, AMD, ARM, Cavium and Freescale During DAC 2015, Synopsys hosted a luncheon event at DAC in San Francisco, CA.
Here, Synopsys R&D Director, Bernie DeLay, talks to EDACafe on the value of native SystemVerilog and UVM support in our VIP titles. He describes how our memory and protocol VIP have been built debug-friendly with Protocol Analyzer, and support constraint random verification for full functional coverage with back-annotation to executable verification plans.
In this video, you will learn how several users are benefiting from the performance advantage of using Synopsys VIP http://bit.ly/1Kau83g
Here, Synopsys Applications Consultant, Vaish Ramachandran, describes how best we can use Synopsys’ VIP Configuration Creator for configuring memory VIPs http://bit.ly/1JcvSII
In this video, Paul Graykowski of Synopsys gives an overview of the PCI Express VIP Monitor and Test Suites http://bit.ly/1DHIdyQ
In this video, Paul Graykowski of Synopsys gives an overview of the PCI Express VIP’s capabilities that will support your efforts to accelerate the debug process: