VIP Central

Archive for the 'PCIe' Category

 

A Joint Webinar by Synopsys and NVM Express™ Organization – Virtualization and NVMe

With the rise of cloud computing and large scale data centers, both developers and consumers are demanding for more efficient ways to rapidly access their data. Seeing the advantage of its high performance, the storage industry is quickly adopting the Non-Volatile Memory Express (NVMe) standard. The NVMe™ standard continues to push the storage envelope with […]

Continue Reading...

Posted in Data Center, events, NVMe, PCIe, Storage, Uncategorized | Comments Off on A Joint Webinar by Synopsys and NVM Express™ Organization – Virtualization and NVMe

 

Latest Buzz on Next Generation Protocols

We recently published the VIP Newsletter for Jan 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.                     The Q1 2018 edition […]

Continue Reading...

Posted in ACE, AMBA, Automotive, AXI, C-PHY, Camera, CHI, CSI, D-PHY, Data Center, DDR, Debug, Flash, Interconnects, LPDDR, Memory, Methodology, MIPI, Mobile SoC, NVMe, PCIe, Processor Subsystems, SPI, Storage, SystemVerilog, Test Suites, Type C, Uncategorized, UVM | Comments Off on Latest Buzz on Next Generation Protocols

 

PCIe PIPE 4.4.1: Enabler for PCIe Gen4

PCIe is a multi-layered serial bus protocol which implements dual-simplex link. It provides high speed data transfer and low latency owing to its dedicated point to point topology. To accelerate verification and device development time for PCIe based sub-systems, PIPE (PHY Interface for the PCI Express) architecture was defined by Intel. PIPE is a standard […]

Continue Reading...

Posted in Data Center, NVMe, PCIe, Storage | Comments Off on PCIe PIPE 4.4.1: Enabler for PCIe Gen4

 

Jumping on the Demand for NVMe 1.3 Streams

Is your latest NVMe design taking advantage of Streams? Adoption of this new NVMe technology is gaining momentum with Synopsys customers. Streams are part of the new, optional, Directives feature introduced in the NVMe 1.3 specification. Directives allow the passing of metadata between hosts and controllers via existing NVMe commands. Streams are unique in that […]

Continue Reading...

Posted in NVMe, PCIe, Storage | Comments Off on Jumping on the Demand for NVMe 1.3 Streams

 

Is Your Design PCIe Gen5 Ready? Verify with Synopsys VIP and Testsuite

In June 2017, PCI-SIG announced the new PCI Express 5.0 specification, at the PCI-SIG DevCon. The new version of the specification doubled bit rate to 32GT/s per lane providing about 128GB/s bandwidth for a x16 Link (16 lanes). The chart below provides a comparison of bit-rate and bandwidth for the different PCIe Generations. The PCIe […]

Continue Reading...

Posted in Automotive, Data Center, DesignWare, PCIe | Comments Off on Is Your Design PCIe Gen5 Ready? Verify with Synopsys VIP and Testsuite

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 […]

Continue Reading...

Posted in NVMe, PCIe | Comments Off on PCIe 4.0: A Quick Primer on New Features

 

PCI-SIG Conference – Did you Know?

The PCI-SIG Developers Conference 2017 took place in the Santa Clara, California convention center on June 7-8.  Today we will provide conference highlights, observations, and result of the 25-year anniversary dinner quiz.  The Synopsys team supporting the exhibition was kept very busy, running five live demos showing the latest in PCIe design and verification solutions. […]

Continue Reading...

Posted in events, PCIe | Comments Off on PCI-SIG Conference – Did you Know?

 

Latest Buzz in Verification IP

    We recently released the Q2 VIP newsletter containing trending topics, leading solutions, in depth technical articles, videos, webinars and product announcements from VIP and protocol experts. In case you missed the latest buzz on Verification IP, you can read it here.                         […]

Continue Reading...

Posted in ACE, AMBA, Automotive, CAN, CCI400, CHI, Data Center, Display, DisplayPort, eMMC, Ethernet AVB, FlexRay, HDCP, Interconnects, JESD, LIN, MIPI, PCIe, Processor Subsystems, UFS | Comments Off on Latest Buzz in Verification IP

 

PCIe Gen4 Test Suite with Spec Linking Demo

During the recent PCI-SIG Developers Conference 2016, held in Santa Clara, CA, there was a lot of interest from attendees regarding Synopsys PCIe Gen4 VIP and source code test suite.  One common question that was asked: How do we identify and maintain up to date tests that support the latest PCIe Gen4 specification? Demonstration: The […]

Continue Reading...

Posted in Data Center, NVMe, PCIe, Processor Subsystems, Test Suites, Uncategorized | Comments Off on PCIe Gen4 Test Suite with Spec Linking Demo

 

PCI SIG Update: Latest on PCIe Gen4 0.7 VIP and Test Suite

The PCI-SIG Developers Conference 2016 was held at Santa Clara in last week and it was a great success. Our PCIe experts were there and we bring you the highlights of conference. There was a lot of interest and queries from attendees regarding our latest version of the PCI VIP for Gen 4.  The VIP supports […]

Continue Reading...

Posted in PCIe | Comments Off on PCI SIG Update: Latest on PCIe Gen4 0.7 VIP and Test Suite