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Archive for the 'Data Center' Category

 

Verification Automation Solutions for Arm AMBA Coherent Interconnects

Arm TechCon 2017 took place at Santa Clara on 24-26th Oct, 2017. This year, Synopsys’ Arm® AMBA® protocol experts were on hand to demonstrate our verification automation solutions for Arm AMBA Coherent Interconnects. Synopsys Auto SoC Testbench generation solution enables easy and quick integration and configuration of hundreds of coherent and non-coherent AMBA ports and […]

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Posted in ACE, AMBA, Automotive, CCI400, CHI, Data Center, Interconects, Methodology, Mobile SoC, NOC, Processor Subsystems, SystemVerilog, Test Suites, UVM | No Comments »

 

First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

USB has literally become universal and present in every device ranging from smart phones and personal computers, IoT and wearables, storage and networking, consumer electronics and gaming consoles, automotive and many other emerging verticals. The success of USB can be attributed to innovation with each new generation—the capability to transfer data as well as supply […]

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Posted in Automotive, Data Center, Display, Flash, Mobile SoC, Storage, Type C, Uncategorized | No Comments »

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 […]

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Posted in NVMe, PCIe | Comments Off on PCIe 4.0: A Quick Primer on New Features

 

LPDDR4: What Makes It Faster and Reduces Power Consumption

DRAM memories are the ‘heart’ of any computational device, e.g. smart phones, laptops, servers etc. LPDDR4 was mainly designed to increase memory speed and efficiency for mobile computing devices such as smartphones, tablets, and ultra-thin notebooks.  It supports speeds up to 4267Mbps (double the speed of LPDDR3) and 1.1 V input/output buffer power, along with […]

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Posted in Automotive, Data Center, DDR, DFI, LPDDR, Memory, Mobile SoC | Comments Off on LPDDR4: What Makes It Faster and Reduces Power Consumption

 

PCI-SIG Conference – Did you Know?

The PCI-SIG Developers Conference 2017 took place in the Santa Clara, California convention center on June 7-8.  Today we will provide conference highlights, observations, and result of the 25-year anniversary dinner quiz.  The Synopsys team supporting the exhibition was kept very busy, running five live demos showing the latest in PCIe design and verification solutions. […]

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Posted in events, PCIe | Comments Off on PCI-SIG Conference – Did you Know?

 

Latest Buzz in Verification IP

    We recently released the Q2 VIP newsletter containing trending topics, leading solutions, in depth technical articles, videos, webinars and product announcements from VIP and protocol experts. In case you missed the latest buzz on Verification IP, you can read it here.                         […]

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Posted in ACE, AMBA, Automotive, CAN, CCI400, CHI, Data Center, Display, DisplayPort, eMMC, Ethernet AVB, FlexRay, HDCP, Interconects, JESD, LIN, MIPI, PCIe, Processor Subsystems, UFS | Comments Off on Latest Buzz in Verification IP

 

Next Generation Memory technologies: Ready to take the verification challenges?

Advancement in Memory technologies and the demand for faster and higher density configuration leaves verification engineers in a limbo. The Memory world is debating the next wave of memory protocols and technologies such as Next Generation DDR, HBM, and NVDIMM: DDR: Wishfully the next generation DDR specifications will bring many benefits to computers. With faster and […]

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Posted in Data Center, DDR, Debug, DFI, eMMC, events, Flash, HBM, HMC, LPDDR, Memory, ONFi, Storage, UFS | Comments Off on Next Generation Memory technologies: Ready to take the verification challenges?

 

PCIe Gen4 Test Suite with Spec Linking Demo

During the recent PCI-SIG Developers Conference 2016, held in Santa Clara, CA, there was a lot of interest from attendees regarding Synopsys PCIe Gen4 VIP and source code test suite.  One common question that was asked: How do we identify and maintain up to date tests that support the latest PCIe Gen4 specification? Demonstration: The […]

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Posted in Data Center, NVMe, PCIe, Processor Subsystems, Test Suites, Uncategorized | Comments Off on PCIe Gen4 Test Suite with Spec Linking Demo

 

PCI SIG Update: Latest on PCIe Gen4 0.7 VIP and Test Suite

The PCI-SIG Developers Conference 2016 was held at Santa Clara in last week and it was a great success. Our PCIe experts were there and we bring you the highlights of conference. There was a lot of interest and queries from attendees regarding our latest version of the PCI VIP for Gen 4.  The VIP supports […]

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Posted in PCIe | Comments Off on PCI SIG Update: Latest on PCIe Gen4 0.7 VIP and Test Suite

 

Verification Highlights from DAC 2016

The Design Automation Conference (DAC) 2016 was a great success and here we provide you the highlights of Synopsys’ activities at the event. Synopsys hosted the annual “SoC Leaders Verify with Synopsys” Verification luncheon.  The luncheon featured industry experts and executives from Cavium, NXP, Qualcomm and Samsung, and drove our main messages of collaboration, with […]

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Posted in AMBA, Audio, Automotive, Camera, CAN, Data Center, DDR, Debug, DesignWare, Display, eMMC, Ethernet, Ethernet AVB, Flash, FlexRay, HBM, HMC, Interconects, Interface Subsystems, LIN, LPDDR, Memory, Methodology, MIPI, Mobile SoC, ONFi, PCIe, Processor Subsystems, Storage, SystemVerilog, Test Suites, UFS, Uncategorized, USB, UVM | Comments Off on Verification Highlights from DAC 2016