VIP Central

Archive for the 'Data Center' Category

 

A Joint Webinar by Synopsys and NVM Express™ Organization – Virtualization and NVMe

With the rise of cloud computing and large scale data centers, both developers and consumers are demanding for more efficient ways to rapidly access their data. Seeing the advantage of its high performance, the storage industry is quickly adopting the Non-Volatile Memory Express (NVMe) standard. The NVMe™ standard continues to push the storage envelope with […]

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Posted in Data Center, events, NVMe, PCIe, Storage, Uncategorized | No Comments »

 

LPDDR5: Enhancements in Bandwidth, Reliability, and Power for IoT, AI, and Image Processing

New applications like Cloud Computing, Artificial Intelligence, Autonomous cars, Augmented reality, Embedded vision are driving stricter requirements around memory performance and power efficiency.  Memory is central to these systems, that require high bandwidth and speed along with lower power and lower cost. With these emerging market needs, the memory industry started to move from planar […]

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Posted in Automotive, Camera, DDR, DFI, Display, HBM, HMC, LPDDR, Memory, Mobile SoC | Comments Off on LPDDR5: Enhancements in Bandwidth, Reliability, and Power for IoT, AI, and Image Processing

 

Bye Bye Bottlenecks – Automated SoC Performance Verification is Here!

SoC performance is a key competitive advantage in the marketplace, and the choice and configuration of protocol IP and interconnects is geared towards maximizing said performance. A case in point is the use of HBM (High Bandwidth Memory) technology and memory controllers. Currently in its third generation, HBM boasts of high-performance while using lesser power […]

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Posted in Automotive, Data Center, DDR, DFI, events, HBM, LPDDR, Memory, Uncategorized | Comments Off on Bye Bye Bottlenecks – Automated SoC Performance Verification is Here!

 

Latest Buzz on Next Generation Protocols

We recently published the VIP Newsletter for Jan 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.                     The Q1 2018 edition […]

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Posted in ACE, AMBA, Automotive, AXI, C-PHY, Camera, CHI, CSI, D-PHY, Data Center, DDR, Debug, Flash, Interconnects, LPDDR, Memory, Methodology, MIPI, Mobile SoC, NVMe, PCIe, Processor Subsystems, SPI, Storage, SystemVerilog, Test Suites, Type C, Uncategorized, UVM | Comments Off on Latest Buzz on Next Generation Protocols

 

PCIe PIPE 4.4.1: Enabler for PCIe Gen4

PCIe is a multi-layered serial bus protocol which implements dual-simplex link. It provides high speed data transfer and low latency owing to its dedicated point to point topology. To accelerate verification and device development time for PCIe based sub-systems, PIPE (PHY Interface for the PCI Express) architecture was defined by Intel. PIPE is a standard […]

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Posted in Data Center, NVMe, PCIe, Storage | Comments Off on PCIe PIPE 4.4.1: Enabler for PCIe Gen4

 

Jumping on the Demand for NVMe 1.3 Streams

Is your latest NVMe design taking advantage of Streams? Adoption of this new NVMe technology is gaining momentum with Synopsys customers. Streams are part of the new, optional, Directives feature introduced in the NVMe 1.3 specification. Directives allow the passing of metadata between hosts and controllers via existing NVMe commands. Streams are unique in that […]

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Posted in NVMe, PCIe, Storage | Comments Off on Jumping on the Demand for NVMe 1.3 Streams

 

Is Your Design PCIe Gen5 Ready? Verify with Synopsys VIP and Testsuite

In June 2017, PCI-SIG announced the new PCI Express 5.0 specification, at the PCI-SIG DevCon. The new version of the specification doubled bit rate to 32GT/s per lane providing about 128GB/s bandwidth for a x16 Link (16 lanes). The chart below provides a comparison of bit-rate and bandwidth for the different PCIe Generations. The PCIe […]

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Posted in Automotive, Data Center, DesignWare, PCIe | Comments Off on Is Your Design PCIe Gen5 Ready? Verify with Synopsys VIP and Testsuite

 

Verification Automation Solutions for Arm AMBA Coherent Interconnects

Arm TechCon 2017 took place at Santa Clara on 24-26th Oct, 2017. This year, Synopsys’ Arm® AMBA® protocol experts were on hand to demonstrate our verification automation solutions for Arm AMBA Coherent Interconnects. Synopsys Auto SoC Testbench generation solution enables easy and quick integration and configuration of hundreds of coherent and non-coherent AMBA ports and […]

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Posted in ACE, AMBA, Automotive, CCI400, CHI, Data Center, Interconnects, Methodology, Mobile SoC, NOC, Processor Subsystems, SystemVerilog, Test Suites, UVM | Comments Off on Verification Automation Solutions for Arm AMBA Coherent Interconnects

 

First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

USB has literally become universal and present in every device ranging from smart phones and personal computers, IoT and wearables, storage and networking, consumer electronics and gaming consoles, automotive and many other emerging verticals. The success of USB can be attributed to innovation with each new generation—the capability to transfer data as well as supply […]

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Posted in Automotive, Data Center, Display, Flash, Mobile SoC, Storage, Type C, Uncategorized | Comments Off on First USB 3.2 VIP and TestSuite: Enhances the Verification Solution for USB IP, SoC and Type-C Subsystems

 

PCIe 4.0: A Quick Primer on New Features

‘Big Data’, ‘IoT’, ‘Mobile’, ‘Networking’ and ‘Storage’ applications are the key drivers for next generation high-performance systems. To meet the bandwidth requirement of the emerging applications, it was required to either increase the lane width or speed. Increasing the lane width isn’t cost effective and thus increasing speed is the best viable option. PCIe 4.0 […]

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Posted in NVMe, PCIe | Comments Off on PCIe 4.0: A Quick Primer on New Features