Posts by VIP Experts:
The semiconductor industry is buzzing with new technologies – Artificial Intelligence (AI), Machine Learning (ML), IoT, Automotive, etc. – bringing a revolution by easing out our day-to-day lives and improving considerably performance, bandwidth and reliable data processing and transfer. Reliability and data integrity are even more important for safety critical verticals where even the slightest error can be catastrophic. Stepping up to meet industry trends, JEDEC recently announced its fifth revision of LPDDR standard JESD209-5 which is all equipped to match the latest bandwidth, power, performance, and reliability trends. Immediately following this, Synopsys announced the Industry’s First LPDDR5 IP & VIP Solution Extending Leadership in DDR5/LPDDR5. Strengthening our leadership in memory VIP, recently we also announced the Industry’s First DDR5 NVDIMM-P Verification IP, showing our continued collaboration with leading memory vendors.
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Posted in AI, Automotive, IoT, LPDDR, Memory, Uncategorized |
PCI-SIG recently announced the New PCI Express® 5.0 Specification, reaching 32GT/s transfer rates while maintaining low power and backward compatibility with previous technology generations. Aligned with this, Synopsys also announced the collaboration of its Design and Verification Solutions with Astera Labs to Develop Industry’s First PCIe 5.0 Retimer SoC. Emerging applications like AI, cloud, data center, and 5G have been driving the exponential increase in bandwidth requirements and PCIe has evolved to meet these increasing requirements.
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Posted in CCIX, Data Center, PCIe, Uncategorized |
The most awaited news of the year is officially here! USB Promoter Group has officially announced USB4 specification, which is an extensive upgrade over USB 3.2 specification. The new specification guarantees double the speed of USB 3.2 Gen 2×2, and has built in Thunderbolt™ 3 compatibility. The official specification release is expected by mid-2019.
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Posted in Automotive, Mobile SoC, Type C, USB |
The key features driving future memories are memory density, speed, lower operating voltage, and faster access. DDR5 supports memory density from 8Gb to 64Gb combined with a wide range of data rate from 3200 MT/s to 6400 MT/s. The operating voltage of DDR5 is further reduced from 1.2V of DDR4 to 1.1V.
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Posted in DDR, DFI, Memory |
High resolution 8k UHD displays for emerging technologies like connected cars, IoT, and AR/VR (Augmented/Virtual Reality) require high bandwidth to support the high-resolution transmission. MIPI DSI is the widely used display interface, but the bandwidth provided by PHY layers isn’t sufficient enough to support the high-resolution displays; therefore, a compression technique like DSC (Display Stream Compression) is required. One of our recent blog discussed about DSC 1.2 in HDMI 2.1 – High Resolution Displays for Mobile, TV, PC and Automotive Enabled by DSC 1.2 in HDMI 2.1. In this blog, we will see how DSC 1.2 enables MIPI DSI to support the high-resolution displays for emerging applications.
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Posted in Automotive, Display, DSC, DSI, Uncategorized |
The latest buzzword in the world of TVs and smartphones is High Dynamic Range (HDR). Many of us might already know that an HDR TV improves the viewing experience by offering better picture quality, just like people who use the latest smartphones know that turning on the HDR mode in the camera helps in capturing more lively pictures. In November 2017, the HDMI forum officially released HDMI 2.1 adding more to our joy, by offering the new and improved HDR. The announcement goes on to say “Dynamic HDR support ensures every moment of a video is displayed at its ideal values for depth, detail, brightness, contrast and wider color gamuts—on a scene-by-scene or even a frame-by-frame basis”. Before we explore HDR and Dynamic HDR in detail, let’s first understand how Standard Dynamic Range (SDR) works.
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Posted in Automotive, Camera, Display, DSC, HDMI, Mobile SoC |
HDMI 2.1/2.0 bring significant improvements over previous versions in terms of speed, data integrity, and mode of data transmission. For more details on how HDMI has evolved, read our previous blog – HDMI 1.4 to 2.1: How it Became the Most Popular Display Interface.
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Posted in Automotive, Display, DSC, HDCP, HDMI, Mobile SoC |
Artificial intelligence and machine learning are rapidly penetrating a wide spectrum of devices, driving the re-architecture of SoC designs, requiring more memory space and higher bandwidth to transfer and process data. This change requires higher speed interfaces and wider buses, paving the path for enhancements in latest PCIe, USB, DP, and SATA protocol specifications, as well as upgrades in PIPE (PHY Interface for the PCI Express) specification as the preferred PHY interface.
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Posted in Data Center, PCIe |
Next generation SoC designs require faster coherent interconnects for high performance applications such as machine learning, network processing, storage off-load, in-memory data base and 4G/5G wireless technology. CCIX (Cache Coherent Interconnect for Accelerators), a new protocol standard, provides benefits of cache coherency and peer processing which enables the faster interconnect. CCIX is designed smartly to use the well-established PCIe infrastructure to carry coherency packets across the link with little modification. CCIX specification is compatible with PCIe base specification 4.0. PCIe implementation is extended to implement a CCIX transaction layer, responsible for carrying the coherency messages.
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Posted in CCIX, CHI, Data Center, Interconnects, PCIe, Storage |
DSC has enabled the use of high resolution displays in televisions, PC monitors, mobiles, and automotive infotainment systems. It provides a high quality, low latency algorithm to resolve the bottleneck of high bandwidth requirements needed to support the high resolution.
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Posted in Automotive, Display, DisplayPort, DSC, HDMI, Mobile SoC |
