Verification Central

Author Archive
Varun Agrawal
varunagrawal


Posts by Varun Agrawal:

 

Synopsys VCS and VIP By-the-Minute is Now a Reality with Synopsys Verification Instance

Verification of today’s devices takes an enormous amount of computing power. Advanced methodologies require a huge number of automated tests to exercise all parts of the design. Regression tests must run frequently to ensure that changes do not break previously verified functionality. Most projects cannot afford to buy enough compute resources and simulation licenses to meet their peak demand, and many projects struggle to build their own verification infrastructure. A more flexible approach is required.

Continue Reading...

Posted in Cloud

 

Verification of Light Weight Forward Error Correction (FEC) and Strong Cyclic Redundancy Checks (CRC) feature in PCIe 6.0

Introduction:

Continue Reading...

Posted in Data Center, PCIe, Protocol Continuum, Test Suites

 

Synopsys Introduces Industry’s First CXL 3.0 Verification Solution

CXL 3.0 Introduction Compute Express Link™ (CXL™) 3.0 is an open standard that defines high-speed cache-coherent interconnect and memory expander interconnect for CPU-to-device and CPU-to-memory connections. It is built on PCI Express® (PCIe®) 6.0 r1.0 specifications and leverages PCIe for physical and electrical interface. Artificial Intelligence (AI) and Machine Learning (ML) applications and widespread smart devices (e.g., autonomous vehicles) are driving factors behind exponentially rising requirements to build high-performing data center units that involve CPUs connected with accelerator processors, memory attached devices, and SmartNICs. These systems demand low latency requirements for CPU-attached devices to perform compute-intensive operations on massive data while maintaining coherency. To meet the increasing performance and scale requirements of these systems, the CXL Consortium has evolved its standard through the introduction of CXL 3.0. CXL 3.0 Specification Highlights

Continue Reading...

Posted in AI, CXL, Data Center, DesignWare, Protocol Continuum, Verification Service

 

Synopsys Protocol Verification Solution for UCIe 1.0

Need for Multi-die Chiplets Interconnect

Continue Reading...

Posted in 5G, AI, Automotive, CXL, Data Center, Verification Service

 

Say Goodbye to blank screens with HDMI’s Quick Media Switching

 

Continue Reading...

Posted in AI, Data Center, Display, HDMI, Uncategorized

 

Coverage Models – Filling in the Holes for Memory VIP

Looking for a way to reduce effort defining and tracking functional verification goals in your Memory Controller/PHY and Subsystem Verification Project?

Continue Reading...

Posted in Uncategorized

 

Attention Gamers! HDMI 2.1a Introduces Source Based Tone Mapping (SBTM)

HDMI (High-Definition Multimedia Interface) is the most popular medium for transporting both audio and video information between two digital devices. In the past two decades, HDMI technology has evolved from HDMI 1.0 to HDMI 2.0. In 2017 HDMI 2.1 introduced enhanced gaming and media features such as Variable Refresh Rate (VRR) and Auto Low Latency Mode (ALLM) to eliminate lag, stutter, and tearing, adding smoothness to the gaming and video experience. Recently the HDMI Forum has announced a new version, HDMI2.1a, that brings a standout gamer-friendly feature, Source-Based Tone Mapping (SBTM).

Continue Reading...

Posted in Display, HDMI, Protocol Continuum