Arm recently announced the availability of the next iteration of the Arm® AMBA® 5 CHI protocol – CHI Issue F (CHI-F). AMBA 5 CHI-F is built on top of the existing AMBA CHI Issue E (CHI-E) specification (read our blog on AMBA CHI-E here), and introduces several exciting features related to the latest Arm architecture and optimized transaction flows.
Synopsys, a close partner of Arm, offers a broad set AMBA protocol solutions for early modelling, design, implementation, verification, validation, and system bring-up. Synopsys leading verification solutions for Arm protocols cover a full range of AMBA specifications including next generation AMBA ACE5, AXI5 and now AMBA 5 CHI-F. Synopsys’ verification automation solutions also offer testbench generation with Synopsys VC AutoTestbench and performance verification of Arm based SoCs with Synopsys VC AutoPerformance.
“Synopsys offers comprehensive protocol verification solutions for all existing and next-generation AMBA specifications, including AMBA 5 CHI-F,” said Vikas Gautam, vice president of R&D for the Synopsys Verification Group. “Our verification solutions leverage Synopsys leading IPs to drive best-in-class verification credibility, and our offerings for Simulation, Emulation and Prototyping platforms ensure that our customer get end-to-end IP to SoC level verification closure. By working closely with Arm to deliver and deploy first-in-industry customer-proven solutions, we enable the market makers to adopt the latest specifications rapidly.”
This blog will explain the key features of the recent AMBA CHI-F release.
With the increasing trend of moving on-premise workloads to the cloud and increased usage of private/personal data for compute/ML, the requirements for enhanced private computation for data processed in untrusted/shared environments is rising. Arm’s Confidential Compute Architecture (CCA) caries such computations in a hardware-based secure environment, even protected from privileged software.
Realm Management Extensions (RME) is one of the key hardware changes introduced as part of CCA. Along with other components of CCA, RME enables support for trusted, dynamic, and attestable execution regions.
The salient features of RME are:
WriteNoSnpDef is a single copy 64-byte atomic write request which can be rejected by the completer. The transaction flows are similar to the WriteNoSnp transaction. One of the typical use cases of this transaction is where a gathered 64-byte data is sent as atomic write to shared queues within an accelerator. The completer can reject the write request and issue a Defer response to the requester which is an indication that the write could not be processed but might be successful if issued at a later point in time. The requester can later repeat the write request.
PBHA values are obtained from page tables during address translations. These four-bit values are propagated through the memory system with transactions and can be used to control hardware system components. For predictable results, it is expected that all the translations to a given physical address (PA) provide the same PBHA value.
Permitted TagOp settings are updated for ReadOnceMakeInvalid, ReadOnceCleanInvalid and MakeReadUnique Transactions.
Synopsys VIP for Arm AMBA 5 CHI provides performance analysis solutions, comprehensive system level protocol-checks, data integrity checks and cache coherency. In-built sequence collection, functional coverage model, verification plans, and usage examples are included to ensure fast bring-up and achieve wholistic verification closure. Synopsys is collaborating with early customers and partners to extend the standard architecture for their next-generation coherent designs with new features us the Synopsys VIP for the AMBA 5 CHI-F specification.
Synopsys VIP is natively integrated with the Synopsys Verdi® Protocol Analyzer debug solution as well as Synopsys Verdi® Performance Analyzer. Running system-level payload on SoCs requires a faster hardware-based pre-silicon solution. Synopsys transactors, memory models, hybrid and virtual solutions based on Synopsys IP enable various verification and validation use-cases on the industry’s fastest verification hardware, Synopsys ZeBu® emulation and Synopsys HAPS® prototyping systems.
To learn more about Synopsys VIP & Test Suites for AMBA protocols please visit http://synopsys.com/vip