Posted by VIP Experts on November 1, 2018
HDMI 2.1/2.0 bring significant improvements over previous versions in terms of speed, data integrity, and mode of data transmission. For more details on how HDMI has evolved, read our previous blog – HDMI 1.4 to 2.1: How it Became the Most Popular Display Interface.
Scrambling is one of the most important features introduced in HDMI 2.0. It is used to reduce Electro-Magnetic Interference (EMI) and Radio Frequency Interference (RFI). In this blog we will have a look at the scrambling feature introduced in HDMI 2.0.
HDMI 2.0 increases the transition-minimized differential signaling (TMDS) character rate from 340 to 600 Mega characters per second (Mcsc) over previous versions, and also adds scrambling for EMI/RFI for different rates. The relation in TMDS clock rate, bit rate, and character rates below 340 Mcsc or above 340 Mcsc, is shown in below table. A Source does not transmit at TMDS character rates higher than the maximum rate supported by a Sink device.
Scrambling for EMI/RFI Reduction
Scrambling is done in all the three data channels - TMDS channels 0, 1, and 2. EMI/RFI reduction in the TMDS clock channel is achieved by reducing clock frequency to one-fourth and reducing the clock amplitude. By default, the scrambling is enabled in HDMI 2.0 at TMDS bit rates above 3.4 Gbps to 6.0 Gbps. The Source enables scrambling for TMDS rates below 3.4 Gbps if both the Source and the Sink support scrambling at that TMDS character rate. Scrambling is applied to Active Video, Data Islands, Guard Bands, and most Control Periods. If a portion of the control period, an 8-character period, is transmitted unscrambled, it is referred to as an Unscrambled Control Period (UCP) as indicated in the red portion of the figure below. The entire control period except UCP, is referred to as a Scrambler Synchronization Control Period (SSCP). One SSCP per field can be transmitted to maintain character synchronization.
The table below indicates how different periods are scrambled and encoded.
Linear-Feedback Shift Register (LFSR) is used for encoding each data channel on the Source side and for decoding each data channel on the Sink side. The Source simultaneously initializes the LFSRs with the appropriate seed values, 16’hFFFF for data channel 0, 16’hFFFE for data channel 1, and 16’hFFFD for data channel 2, when it transmits the 8-character sequence of Unscrambled Control Codes (UCC) in SSCP. The Sink initializes the LFSRs with the seed values when it receives an 8-character sequence of UCC in SSCP on the three data channels simultaneously. The seed values are used to scramble/descramble the first character on each channel following the UCC sequence.
The snapshot below shows the TMDS bit, character, and clock rate, along with LFSR data, 8-bit TMDS input data, 8-bit TMDS scrambled data, and 10-bit TMDS encoded data, which will get transmitted to the Sink for all three channels.
Use of UCC in Scrambling
UCC is used for character synchronization, inter-channel synchronization, and to reset the LFSRs. These codes are transmitted during SSCP. Source performs the following functionality during UCC:
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Authored by Snigdha Dua
A global team of protocol experts that share their insights and technical expertise in the areas of Automotive, DRAM and Flash Memories, Storage, Display, MIPI, AMBA, Ethernet, PCIe, USB and many other bus and interface protocols. This comprehensive team participates in standards committees and will provide the latest information and updates as it relates to your future design considerations.