Posted by Ankur Jain on February 6, 2018
We recently published the VIP Newsletter for Jan 2018, containing trending topics, leading solutions, in depth technical articles, videos, webinars, and updates on next generation protocols. In case you missed the latest buzz on Verification IP, you can read it here.
The Q1 2018 edition of the VIP newsletter, covers content on new VIP for next-generation protocol specifications as well as updates on existing VIP:
Last week, we also organized a PCIe webinar – ► Top Next-Gen PCIe Verification Challenges: Equalization, RX Margining, and Retimer. Leading edge design teams are starting to evaluate and consider the adoption of PCIe Gen4 and Gen 5 specifications. While providing up to 32 GT/s on a familiar bus, adoption is not without its verification challenges. This webinar gives a brief overview of the latest PCIe specifications and address the top verification issues encountered by early adopters. We analyze how best to overcome challenges as they relate to Retimers, Equalization, and RX Margining. If you missed the live webinar, you can watch it on-demand here.
Synopsys supports 90+ Industry Leading Verification IP Protocols such as AMBA, CCIX, DRAM Memory (DDR5, LPDDR5), Flash Memory, Ethernet (400G), MIPI, PCIe (Gen5), SAS, SATA, USB(3.2). Our recent blogs on next generation protocols: –
As an industry leader for complete VIP solutions, Synopsys is committed to providing you with the resources you need to accelerate your designs. Don’t miss the upcoming editions, subscribe to the VIP Newsletter today, and receive the latest information on VIP straight into your inbox every quarter. For a complete list of Verification IP and Test Suites, visit www.synopsys.com/vip.
A global team of protocol experts that share their insights and technical expertise in the areas of Automotive, DRAM and Flash Memories, Storage, Display, MIPI, AMBA, Ethernet, PCIe, USB and many other bus and interface protocols. This comprehensive team participates in standards committees and will provide the latest information and updates as it relates to your future design considerations.