Posted by VIP Experts on September 13, 2017
SAS (Serial Attached SCSI) continues to be the interface of choice for mission-critical storage sub-systems. SAS 24G is more than just a 2x speed-bump over previous generation of SAS 12GB, rather it’s a major overhaul of the technology.
In the previous blog – Decoding SAS 24G: New Encoding and Features, we looked at the recently introduced 128b/150b Encoding, SAS Protocol Layer(SPL) packets and Forward Error Correction (FEC) added to support transmission at 22.5Gbps. The SPL packet is a 150-bit block containing a 2-bit header, 128 bit SPL packet payload and 20-bit FEC. The FEC field of the SPL packet aids in error detection and recovery. Continuing with the SAS blog series, we shall look at Binary primitives, Extended Binary primitives and primitive parameters in this post.
Binary primitives & Extended binary primitives
Primitives are special dwords that are used to provide control or status of the link. Primitives are easily recognized on the link as they have a control character in the first byte position of the dword. When transmitting at Gen5, four primitives are grouped together into a SPL Primitive packet with packet header set to 01b. SPL introduces two new primitive types: binary primitives and extended binary primitives.
A binary primitive is 32-bit binary data occupying a dword location in a SPL primitive packet. Unlike the legacy SAS primitives (ACK, RRDY, etc.), binary primitives do not contain a control character in the first byte position. These primitives are not observed on the dword mode links as they lack control character for detection. Transmitters set the PRIMITIVE SYNCHRONIZE SELECT or CONTROL 1/2/3 field of the SPL packet to 01b to indicate the dword in that position is a binary primitive. APTA control primitives (e.g.: APTA_ADJUST (*)) and End of frame identifiers (eg: B_EOF (*)) are some of the binary primitives defined by the standard.
An extended binary primitive is 128-bit binary data and occupies 128-bits of the Packet Payload descriptor in an SPL packet. Primitives of this type has the PRIMITIVE SYNCHRONIZE SELECT field set to 10b. The extended binary primitives defined so far are PACKET_SYNC, PACKET_SYNC_LOST, LINK_RATE_MANAGEMENT and END_TRAIN.
The binary and extended binary primitives are observed only on links operating in Packet mode. The receivers differentiate a binary primitive from legacy SAS primitives by looking for a specific pattern (01b) in the PRIMITIVE SYNCHRONIZE SELECT, CONTROL 1, CONTROL 2, or CONTROL 3 field of the primitive segment. The receiver detects an extended binary primitive when it detects 10b in the PRIMITIVE SYNCHRONIZE field of the SPL packet payload.
The SPL packet structure allows additional variable length parameter data to be associated with primitives. This parameter data is useful in conveying additional information associated with the primitive. A primitive parameter occurs only inside a SPL primitive segment and is always associated with a primitive or binary primitive. A value of 10b in the CONTROL1, CONTROL2 or CONTROL3 indicates the presence of primitive parameter associated with the primitive above. As the parameter data can be of variable length, the PARAMETER LENGTH field defines the length of the parameter data.
SPL defines primitive parameters for CLOSE and OPEN_REJECT (retry class) primitives. SPL defines a 4-byte parameter data for OPEN_REJECT retry-class primitives that can be used to specify the delay after which the open frame can be retried. The CLOSE primitive parameter is defined for an expander device. It is 12-bytes long and the expander conveys the extended fairness priority information to an attached expander device. Endpoints do not originate a primitive parameter for CLOSE and ignore if one is received.
Stay tuned for our next SAS blog on APTA (Active Phy Transmitter Adjustment).
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Authored by Pooja Gupta and Srinivas Vijayaragavan.
A global team of protocol experts that share their insights and technical expertise in the areas of Automotive, DRAM and Flash Memories, Storage, Display, MIPI, AMBA, Ethernet, PCIe, USB and many other bus and interface protocols. This comprehensive team participates in standards committees and will provide the latest information and updates as it relates to your future design considerations.