The PCI-SIG Developers Conference 2017 took place in the Santa Clara, California convention center on June 7-8. Today we will provide conference highlights, observations, and result of the 25-year anniversary dinner quiz. The Synopsys team supporting the exhibition was kept very busy, running five live demos showing the latest in PCIe design and verification solutions. There was a lot of interest and queries from attendees regarding what’s new with PCIe VIP and TestSuite, and easy and effective debug using Verdi integrated protocol analyzer.
Did you know – Gen 5 – Up and Running
PCI-SIG announced the PCIe Gen 5 specification at the conference. Synopsys’ booth had a demo of Gen 5 interface IP displaying link up at Gen 5 speed. In addition to Gen 5, some of the hot topics during the conference were PCIe Gen 4 v0.9, re-timers, lane margining, and easy and effective debug using protocol analyzers.
VIP and TestSuite Demo
PCIe 4.0 Design & Verification demo leveraged VIP and source code TestSuites. Synopsys provides industry’s most comprehensive SystemVerilog based source code TestSuites to achieve accelerated verification closure with high design quality for EP and RC in both serial and PIPE mode. The VIP demo featured tests from the PCIe Gen 4 TestSuite initializing, link training, performing equalization, and transmission of PCIe packets after link-up. The demo also showed interactive debug with Verdi integrated Protocol Analyzer, along with the waveforms, and the smart log. It also highlighted the ability to get internal state from the ASCII variables.
How much do you know about PCIe? That was the question in the air when PCIe Trivia Quiz was held the evening of June 8th at the conference. The quiz was organized as part of PCI-SIG’s 25-year celebration dinner. Over 20 teams, seated around dinner tables, participated in the quiz, with the PCIe experts from Synopsys and NEC winning the first place. The quiz covered a range of questions on PCIe protocol and the 25 years long history of PCI-SIG. It was a fun learning experience for all attendees.
To learn more about Synopsys PCIe VIP and Test Suites, please visit http://synopsys.com/vip.
Authored by Ankur Jain.