VIP Central

 

Join us: DAC Verification Luncheon and Panel

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The Design Automation Conference (DAC) 2017, in Austin, Texas kicks off next week, June 18 – 22. As the leading and longest-running annual design and verification event, DAC is the premier place to network with fellow design and verification engineers.

Join us for Synopsys’ annual Verification Luncheon and Customer Panel – SoC Leaders Verify with Synopsys.  We will highlight next-generation verification technologies as well as discussions about the latest developments in the verification landscape and advanced technology trends. In addition, a panel of industry experts will share their viewpoints on what is driving SoC complexity, how their teams have achieved success and how you can apply their insights on your next project.

Additionally, please visit the Silicon to Software Theater in Synopsys’ booth to hear industry experts and Synopsys R&D representatives talk about industry trends and technology challenges facing the FinFET, IoT, automotive, and mobile computing market segments.

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Want to learn more about Synopsys, attend our DAC conference presentations and special events.

Synopsys VC Verification IP (VIP) provides verification engineers access to 90+ industry’s latest protocols, interfaces and memories required to verify their SoC designs. Deployed across thousands of projects, Synopsys VIP supports ARM® AMBA®, CCIX, Ethernet, MIPI®, PCIe®, USB, DRAM and FLASH memory, automotive, display, storage, and other BUS/interface protocols. For a complete list of Verification IP and Test Suites, visit www.synopsys.com/vip.

Authored by Ankur Jain.