Verification Central


USB Power Delivery Days: Meeting Verification Challenges

The Universal Serial Bus (USB) had its humble beginnings in the mid-1990s to standardize the connection of computer peripherals to PCs, both to communicate and to supply electric power. Today, it has become commonplace on a variety of devices and appliances, including Smartphones, Smart TVs, Automobiles and video game consoles. USB has effectively replaced a variety of earlier interfaces, such as serial and parallel ports with speeds up to 10GB/s (with USB 3.1), as well as separate power chargers for portable devices.

The new USB Power Delivery (PD) specification takes it to the next level by delivering power ranging from 60W (3A @ 20V) to 100W (5A @ 20C) over varied cable profiles: from Type C unmarked cables to Type C electronically marked cables. This increase in supply capability adequately supports high-power consumption equipment, significantly reduces battery charging times and frees the system from AC adapters to achieve a more cable-free life.

If you are designing or verifying SoCs which incorporate USB Power Delivery, you really need to have a Verification IP (VIP) for PD that supports the richness of the specification, makes it easy to verify and debug, and supports you to resolve the verification challenges presented by PD support.

You can learn more about Synopsys VC VIP for USB Power Deliver here.


USB Power Delivery System Architecture

Verifying USB Power Delivery based Designs

Here we discuss some of the capabilities in USB PD, and the verification and debug challenges they present:

1) The USB-PD 2.0 supports Cable Plug Prime and Cable Plug Double Prime configurations apart from the UFP and DFP.

Verification Challenges:

A DFP DUT should be able to communicate with the UFP, Cable Plug Prime and Cable Plug Double Prime with the required type of SOP packet framings and maintain a different protocol stack for each of the device or cable plug.

The DUT, if a UFP or a cable plug, should be able to accept and respond to the messages directed to it.

The Verification IP should be capable of acting as a DFP, UFP or a Cable plug and communicate with the DUT

2) The SOP pattern used in the packet framing is differentiated based on the receiver of the packet. A DFP to UFP communication used SOP pattern, DFP to Cable Plug Prime uses SOP’ pattern and DFP to Cable Plug Double Prime uses SOP”.

Verification Challenge:

The DFP would need configurability for the types of SOP supported.

The VIP should be able to configure the type of SOP supported and respond accordingly. It should ignore the messages not directed to it.

3) Bus Idle and Collision Avoidance: For BMC signaling, if nTransitionCount transitions are not detected within tTransitionWindow, the bus is considered idle. To avoid packet collision on the bus, tInterFrameGap is defined. Inter-frame gap time specifies the minimum time the transmitter has to wait after the transmission of the last bit of a packet before starting the transmission again.

Verification Challenge:

Phy Tx has to take care of the bus idle conditions before starting transmission. Also, transmitter has to follow inter frame gap timing between two consecutive packets.

4) Vendor Defined Messages (VDMs) allow vendors to exchange information that is not defined by the specification and can be used for enabling alternate modes of and for discovery of cable capabilities.

Verification Challenge:

The DUT should be able to send or respond to the VDMs sent by the port partner and, if not supported, should be able to ignore them.

The VIP should be able to send the VDMs to the DFP/UFP or the Cable plug, and should be able to accept the VDMs when operating in the role of a port or a cable plug.

What Synopsys VC Verification IP for USB Power Delivery can do for you

Synopsys VC Verification IP for USB Power Delivery is designed to thoroughly verify USB PD for 1.1 and 2.0 specs along with Type C functionality. The USB PD VIP maps the PD System Architecture (as shown in the figure above) to one agent (single protocol stack) with 3 layers. It also implements both Cable Plug capabilities (SOP’ and SOP’’) for verifying the PD stack. The VIP provides rich testbench and verification features including protocol service, physical service, policy manager service, scale down mode for tiers, callbacks, exceptions and error injection capabilities for easy to code any test scenario both valid and invalid.

Authored by Kavya Udatala, Santosh Moharana and Deepak Nagaria

You can learn more about Synopsys VC VIP for USB Power Deliver here.