VIP Central

Archive for July 2015

 

Increase Productivity with Synopsys Memory VIP

In this video, you will learn how to increase productivity with Synopsys Memory VIP. You can learn more about our VIPs at Verification IP Overview. If you are interested in a hands-on workshop in your area, check out our Memory Verification IP Workshops.

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Posted in DDR, Debug, DFI, eMMC, Flash, HBM, HMC, LPDDR, Memory, Methodology, ONFi, UFS, UVM | Comments Off on Increase Productivity with Synopsys Memory VIP

 

SoC Leaders Verify with Synopsys: DAC 2015 Verification Luncheon

Featuring speakers from Altera, AMD, ARM, Cavium and Freescale During DAC 2015, Synopsys hosted a luncheon event at DAC in San Francisco, CA. Michael Sanie, senior director of verification marketing at Synopsys kicked things off by highlighting the Synopsys Verification Continuum and several key next-generation technologies that are in production and address the need to “Shift-Left” […]

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Posted in Debug, Methodology, Mobile SoC, Processor Subsystems, Success Stories, SystemVerilog, UVM | Comments Off on SoC Leaders Verify with Synopsys: DAC 2015 Verification Luncheon