Posted by patsheridan on November 11, 2016
Best Practices in Architecture Modeling using TLM-2.0 AT with Fast Timed Extensions
Unlike the loosely timed models used for software development, which rely on a high level of abstraction to simulate as fast as possible, the communication between the architecture models in a virtual prototype for early performance analysis requires timing to be modeled more accurately.
This trade-off can seem like a big leap to some, spanning the gap from SystemC TLM-2.0 LT (loosely timed) models at one end and cycle accurate RTL at the other. However, there is a solution in between, designed exactly for this purpose… TLM-2.0 AT, or approximately timed modeling.
The TLM-2.0 AT standard provides a base protocol for modeling timed communication, but it’s generic and it doesn’t implement all the features available in the actual protocols used in production SoCs. This naturally limits the accuracy the base standard can express when used for early performance analysis. Thankfully for architects everywhere, the authors of the TLM-2.0 standard also defined extension mechanisms that enable AT to properly represent popular industry protocols, such as AXI, with accurate timing, while retaining full model interoperability with standards-based AT models. The result is an impressive combination of speed and accuracy.
To illustrate this, we can compare the results of a simple system simulation, where the same communication is modeled in two different ways: first using the TLM-2.0 AT base protocol and second using Synopsys Fast Timed TLM-2.0 extensions for AXI (or FT AXI for short).
Both systems simulate fast enough for architecture exploration and analysis. Zooming in on the read transactions, the tables below highlight a considerable difference in the accuracy:
Because it’s able to express the details of the AXI protocol, the FT AXI system reflects the more accurate behavior. The average throughput and the average duration of the read transactions (along with other available metrics) provide the architect with a more realistic estimate of the performance that can be achieved with the current system.
On the other hand, the results from the other system are overly optimistic and increase the risk that the system will be under-designed. What are the reasons? Without using FT AXI extensions to improve the accuracy of communication, the system using only the TLM-2.0 AT base protocol has limitations:
Synopsys Platform Architect incorporates the Fast Timed AXI Extensions into the TLM APIs available to the architecture virtual prototype. This way the model creator does not need to deal with the details of the respective protocol to enable FT or to enable model interoperability between FT and AT models.
So when using TLM-2.0 AT architecture modeling for early performance analysis., extend yourself! Take advantage of Fast Timed Extensions to achieve the best combination speed and accuracy… it’s fast, accurate, and standards-based.
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.