Posted by Tom De Schutter on October 4, 2016
While I am not much of a golf player, I participated in a golf tournament over the summer. It was a very friendly setup with teams of four playing against each other. Each player of the team hits his ball, and the ball that lands in the best position determines the starting point for every one of the team for the next stroke.
The fact that only the best shot of the team counts, definitely makes this style of tournament more accessible to novice golfers (people like myself). And it did help (a lot) that we had a great golfer on our team.
So while most of the time the shot of our best golfer was the one we took forward, there were multiple ways in which “the lesser golfers” were able to contribute. And I am not just saying this to make me feel good about my role in the team. There is a lot to be said about learning from example. Every time someone strikes the ball, the others can learn about which club to use, which direction to aim at and how hard to hit the ball. Plus, whenever someone made a good shot, it enabled the next person on the team to take more risk to make a great shot.
This inevitably takes me to the prototype world. Partitioning a complex design across multi FPGAs of a physical prototyping system has a lot of the same characteristics. Depending on the utilization and performance achieved by one particular partition, you can set constraints to guide the partitioning tool to improve the partition in a certain direction like e.g. achieving higher performance or lowering/increasing utilization of a particular FPGA.
Learning by example and refining results are keys ways to improve a prototype and merges the best of two worlds: automation of the prototyping tools combined with the prototyping engineer’s design knowledge and understanding of the prototyping goals.
Important to enable such fast iterative partitioning is the ability to run partition iterations in minutes rather than hours. It is also critical to understand the real system level timing. Where standard FPGA tools support static timing analysis, which is good enough to map a design on a single FPGA, true prototyping tools need to enable timing analysis across the FPGA boundaries including information about delays from the TDM IP and cables.
To maximize prototyping performance, timing aware partitioning features should include auto clock replications, multi-hop optimizations, timing driven system route and FPGA SLR-awareness.
The HAPS-80 prototyping solution provides integrated prototyping hardware and software. This enables the prototyping tools to have knowledge about the physical prototyping system. It is like a golf pro who has played a lot on a particular golf course and knows the location of every tree and sandbank, understands how to account for changes in the weather conditions and how to leverage his team to maximize the result.
Prototyping is a team effort, but with good tools it is much easier to achieve your performance goals in the shortest bring up time.
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.