Introducing HAPS-80 FPGA-Based Prototyping Solution

In this month’s blog I would like to focus on a recent prototyping solution announcement from Synopsys. On September 16, Synopsys announced the new HAPS-80 FPGA-based prototyping systems, part of Synopsys’ end-to-end prototyping solution strategy.

As software is now driving the main capabilities of embedded devices, it has taken the spotlight in SoC design.  This is turning a once hardware centric electronics supply chain upside down. To cope with this new reality companies are embracing both virtual and physical prototyping technologies.

Physical prototyping, also known as FPGA-based prototyping, is an important piece of an end-to-end prototyping strategy and has long been used by electronics companies as a way to accelerate software development, hardware and software integration and system validation.  Its ability to connect to a real-world environment and perform realistic scenarios is a key capability.  The ability to perform system validation helps to ensure standards compliance and determine if performance goals can be met. Most importantly the connection with real world I/O can trigger behavior inside the SoC hardware or software that would have otherwise been overlooked.

With growing SoC complexity and time-to-market pressure, there is a need to accelerate prototype bring up while achieving higher system performance and better debug. This is where the new HAPS-80 FPGA-based prototyping solution comes into play. The integration of HAPS hardware and ProtoCompiler software and leveraging Xilinx’s Virtex UltraScale FPGA, HAPS-80 supports configurations up to 1.6 billion ASIC gates and reduces time to first prototype to less than two weeks.

Highlights about the new HAPS-80 Series:

• HAPS-80 systems with ProtoCompiler software delivers up to 100      MHz multi-FPGA performance and new automated high-speed pin-multiplexing
• ProtoCompiler software automates partitioning to reduce time to      first prototype to less than two weeks on average
• HAPS-80 enterprise configurations support up to 1.6 billion      ASIC gates based on the Xilinx Virtex UltraScale FPGA and enable remote      usage and multi-design mode for concurrent design execution
• Built-in debug capabilities are automatically inserted for      greater debugging efficiency and visibility, enabling the capture of      thousands of RTL signals
• Unified Compile with VCS simulation and Unified Debug with      Verdi debug, part of Synopsys’ Verification Continuum platform, eases      migration between simulation, emulation and prototyping saving up to      months of design and verification bring-up time

More information about HAPS-80 can be found at: https://www.synopsys.com/COMPANY/PRESSROOM/Pages/haps80-news-release.aspx

I would also like to point to a blog from my prototyping colleague Michael Posner: https://blogs.synopsys.com/breakingthethreelaws/2015/09/introducing-haps-80-with-fully-integrated-protocompiler-shifting-the-market-to-an-integrated-prototyping-solution/

In the coming months you will hear more from us about the value of deploying an end-to-end prototyping solution leveraging both virtual and physical prototyping for early architecture exploration, software development and test, hardware-software integration and system validation. The new HAPS-80 FPGA-based prototyping solution is an important step forward to address today’s prototyping needs for a software-driven SoC environment.