Leveraging Virtual Prototypes for Hybrid Emulation

As highlighted in many of my blog posts, virtual prototyping has really established itself as the key methodology to shift left software development by decoupling the dependency of software development from hardware availability. The success of the “Better Software. Faster!” book  illustrates the wide spread interest in the methodology.

The success of virtual prototypes has also led users to find more ways to leverage them across a wider range of use cases. For certain tasks, the combined strengths of virtual prototypes and other methodologies can help you achieve a 1 + 1 that is bigger than 2. Examples of these great synergies are virtual prototypes + automotive tools like Saber and Simulink, virtual prototypes + FPGA-based prototypes (called hybrid prototypes) and virtual prototypes + emulation (called hybrid emulation). In this blog we will focus on the use cases for hybrid emulation.

I see three main use cases where hybrid emulation can provide significant benefits to its users:

• Software-driven verification: speed up software execution for SoC verification by running the application subsystem as part of a virtual prototype connected to the rest of the SoC mapped onto an emulator.
• Early software development: by mapping blocks of the design not available or easily modeled in a virtual prototype, like GPUs, onto an emulator, software developers can connect these blocks to their virtual prototypes to develop software in context of the full system.
• Architecture validation: once architecture exploration and optimization is done using traffic generators in virtual prototypes, hybrid emulation enables the traffic generation functions to be replaced with emulated cycle-accurate processor sub-system RTL running the real software for architecture validation.

Users around the world have experienced significant value from the above three use cases. A major SoC company explained how they first used a VDK (virtual development kit) to bring-up, test and debug their application processor software, like the OS and then connected the VDK to their GPU mapped onto an emulator (Synopsys ZeBu) to enable GPU software bring-up. The accuracy of the emulator environment also enabled them to optimize the caches in the system and complete the software performance optimization. Eventually they were able to validate the hardware and software by mapping the entire SoC onto the emulator. This step-by-step effort enabled them to fully leverage the strengths of the different methodologies such as high simulation speed of a VDK to boot up the OS and cycle accuracy of the emulator to optimize and validate the hardware and software.

The value of this hybrid emulation methodology is further explained in an article from Tom Borgstrom: http://electronicdesign.com/eda/hybrid-emulation-accelerates-architecture-optimization-software-development-and-software-driven-.

I also invite you to attend our session at ARM TechCon on this topic: http://schedule.armtechcon.com/session/synopsys-turbocharge-your-verification-with-synopsys-hybrid-emulation

Gwyneth Sauceda, one of our ZeBu emulator experts and I will explain the value of hybrid emulation and dive deeper into the different applications and customer case studies.

See you at ARM TechCon on October 1 from 12pm-12:50pm in the Mission City Ballroom M1 at the Santa Clara convention center.

Or visit us at the Synopsys booth #600.