Posted by Nithya Ruff on October 15, 2012
Watching the Olympics this past summer was quite exciting. I enjoyed seeing athletes at the peak of their performance and multiple records broken in many sports. What we don’t see is the years of practice and work behind this excellence. These athletes work at the technique, strength, endurance and mental attitude of winning. To me, this is no different than the work that goes on behind the scenes of a new chip introduction or for that matter, any new product introduction.
For example, of interest to me is new chip development. We have come to accept that software is a key part of the value of new chips that drive innovative embedded devices. Software enablement proves that the chip works and empowers software developers to develop applications on the chip and provide example reference stacks. This is standard operating procedure by all leading semi vendors.
Further, what is becoming inevitable is that this software and the applications developed on the chip are as varied and demanding as its users. It is this complexity, variety and software support that is driving two behaviors. One is to let software drive hardware design and to test it based on application needs. The second is to start developing the software and supporting tests as early as the availability of chip specifications.
Both of these actions are interconnected. Early development of software allows the interactive and joint development of the HW and SW with each improving the other and working out the kinks of the other. For example, an initial architecture model can be used to bring up boot ROM code showing that the chip is alive and works. The writing of device drivers can exercise various peripherals and the bring-up of an OS like Android demonstrates how some of the features and applications work on the hardware. The software process itself can be iterative and incremental. It can start with a small model of some of the SoC and software for that specific piece can start to be written. As more of the models of the SoC emerge, so can the software as the picture below shows.
What this means to many of the users I talk to is the removal of risk in a project and improvement of the quality the product. A bigger benefit is the fact that the prototype of the chip can be delivered to partners, the field and customers at least six to twelve months before the actual chip is available. So why is this interesting? Feedback from one user sums it up nicely; earlier software development enabled the creation of more than five board support packages along with field training and even won two deals by using an early prototype. All this way before the chip tape-out even comes around. So if sales and bookings can be pulled in and product quality increases, why would anyone not want this advantage?
To excel in anything requires the process of excellence to start early, just as the Olympic athletes showed throughout the Games. The bar rises with every Olympics Games and an athlete cannot afford not to take every advantage available. The fierce and competitive world of device development is the same, new winners are announced every day and new records broken. Without the advantage of starting early, testing with the end in mind and delivering innovation—winning may be only a dream.
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.