Posted by frank schirrmeister on February 2, 2010
Looks like I almost didn’t get to my yearly review of what happened ten years ago in the technology outlook section of IEEE Spectrum. Well, I could blame it on the fact that apparently the January 2000 section of the technology outlook section did not survive my last garage cleanup. But thanks to digital distribution I could find the appropriate issue to compare where we stand 10 years later.
The Technology Outlook section kicks off in the IEEE Spectrum of January 2000 authored by Linda Geppert and William Sweet with a discussion of the importance of standards. Microsoft was on trial for “proprietary standards”. Billy Joy was interviewed about JAVA, put into the public domain by Sun even though they controlled modifications and extensions to “protect it from the fate of SPICE and Unix”. Leonardo Chiariglione talks about what good has come from proprietary standards even though he also drove MPEG-2 as a standard.
So what was up in EDA? Of course! It was all about standards … The feud between SystemC and SystemVerilog was in full swing. Today, with 20-20 hindsight, we know that Co-Design Automation just elegantly played a MBA text book strategy game – picking a strong opponent to beat up – even though the technical differences between SystemVerilog and SystemC were pretty clear from the beginning. Now we also know that it worked.
Linda’s article kicks off with the three obstacles for IC Designers – lack of a unifying language for hardware and software, verification of design correctness and timing closure.
Focusing on the first here, Co-Design Automation is mentioned to have “ruled out the usefulness of extending an existing language to meet system-on-chip needs”, with candidates for extension having been C, C++, Java, and Verilog. Satisfying the three requirements which they set forth for a new language – unification the design process, improvement of design efficiency and evolution from an existing methodology – SuperLog was conceived. The opponent they had chosen was the SystemC Initiative. Several partners, including Synopsys and CoWare, believed that no new language was needed. They introduced SystemC, a modeling platform that extended the capabilities and advantages of C++ into the hardware domain. The supporters of SystemC came top down so to speak and violating Co-Design’s third rule to be evolutionary. They based their path on the observation that most software developers use C and C++ and many systems developers use C++ already to describe their systems at a behavioral level. But until SystemC it has not been possible to describe hardware using the same language.
So where are we ten years later? No surprise – standards have taken over. And has anybody won? No, both have, in their own way. Co-Design Automation was acquired by Synopsys and SuperLog was put into the standardization process to create SystemVerilog for both verification and design. This was the start of the end of proprietary languages like Verisity’s E. Today SystemVerilog is the clear winning language for evolutionary improving existing hardware design and verification – just as Co-Design Automation had predicted. Has it found an entry into software development? No, it hasn’t.
Equally, on the software side, SystemC has won the battle when it comes to becoming the interconnect fabric for virtual platforms, which enable software development. Standardization played a similarly important role. Synopsys acquired Virtio, put key technologies into OSCI and the TLM-2.0 APIs were born from here as a collaboration within the standards body.
So what is the conclusion 10 years later? Well, three things. First, I have to give it to Steve Leibson and his law that it ‘takes 10 years for any disruptive technology to become pervasive in the design community". It looks like SystemC and SystemVerilog are two good examples of his empirical observation, then formulated as “law”. Second, standardization was and is a key component for technology adoption. And third, business is just business and often trumps technology. Co-Design Automation’s approach ten years ago to pick an opponent to get attention as a small company (even though technically the languages were obviously quite different and for different purposes) was the right business approach and played out beautifully, almost like in MBA text books.
Off to a new decade … It remains interesting!
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.