Posted by systemleveldesign on October 21, 2009
There is a lot of conversation these days about the impact of Electronic System Virtualization (ESV) on software development. Isn’t it obvious, that it is much better to develop software earlier, before chips are available? Don’t you agree that looking into the guts a multi-core platform for debugging a tough multi-threading problem is much easier using a Virtual Platform, than to use a board with a JTAG connected debugger? Wouldn’t it be nice if the semiconductor and OEM supply chain use this as their standard way of accelerating their time to market? Isn’t this the only problem that ESV addresses?
Actually this only one problem, albeit a big one, that ESV addresses. It deals typically with the next generation silicon and product, which in most companies is called N+1.
What about the products, that are further out, say N+3? Do you have the software applications that will run on those products in your hand today? No, they will be invented in the next few years. Do you even know the processors that you will be using for N+3? Maybe, but there are no models for those yet. What you do know today is the type of applications that you need to run. You may know the performance profile in terms of traffic that they trigger. You probably know exactly, which interconnect and protocol you will be using, because the interconnect, the backbone of your chip, is typically stable for many generations of platforms that you are developing or will be using.
Getting a precise idea, what your interconnect will deliver for the myriad of use cases and applications, that you need to support, is critical for making your design decision for N+3. The right ‘connection’ with the right bandwidth and priority management between your processors and the internal/external memory systems determines, if your N+3 chip or end product is competitive or not.
If you are a development engineer at an OEM or semiconductor company, this is what you care about.
However, it is even more critical that your company cares about a ‘connection’ at a business level. If you are the SmartPhone OEM trying to stay ahead of the pack or beating #1, you need to specify the most advanced silicon platform that will deliver on that goal. If you are a semiconductor company, that has a socket in N+1, you want to maintain that socket for N+3 or push your competitor out of it.
If you are the OEM, how do you communicate to your bidders, what they need to deliver? If you are the semiconductor supplier, how do you credibly pitch, what you can do vs. your competitor? The risks for miscommunication and missing the performance are high. What if you had an ESV solution, that serves as the specification that you can rely on for N+3? Do you want to have a ‘connection’ between you as an OEM and you as a semi based on industry leading interconnect IP, protocols and ESV solutions for architecture design?
Missing the ‘connection’? Talk to ARM and CoWare.
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.