Posted by frank schirrmeister on July 28, 2009
Well, on Gary Smith’s “What To See at DAC” list 16 out of 24 recommendations start with ESL. The most thoughtful comment I heard on ESL during yesterday’s DAC was related to ESL, but made me think. John Aynsley of Doulos said during the”Town Hall” meeting that he had thought that this years DAC would be the DAC of high-level verification, but it seems it is the DAC of high-level synthesis. Well, the two very likely are related. The drive towards higher levels of abstraction always had been driven by a combination of faster implementation and more productive verification – assuming you can be more productive “up there” and then minimize the verification overall as I outlined in a recent column called “When one plus one needs to be less than one”.
Most of the day I was actually tied up in customer meetings. I heard good things about our System Prototyping Luncheon with LSI and Intel as customer presenters with more than 100 attendees. In our System-Level Catalyst area at the Standards Booth we had standing room presentation (see picture) and demos. So users are definitely interested in understanding ESL technologies.
I briefly attended the town hall meeting at the SystemC North America User Group. They employed interesting technology with which the audience could immediately vote on questions of interest (TED alert – in Germany 15 years ago we had this thing called TED for which you could call in a vote … sometimes with interesting results 🙂 ).
Results were sometimes interesting albeit not always surprising. 90% of attendees liked an open source reference simulator implementation. The majority of attendees seemed to use SystemC for modeling at the Loosely TImed level of abstraction. An automatic path to implementation was the most requested “What does SystemC need”.
At DAC today? There is GreenSocs Breakfast Panel titled: “SystemC TLM: Just add water?” at 8:30 am. You can expect lively discussions when Synopsys’ Andrew Dauman participates in the panel “System Prototypes:Virtual, Hardware or Hybrid?” at 10:30 am and Joachim Kunkel discusses “Silicon IP – Beyond Chips to System” at 3:30 pm. At our Standard’s booth we will have today the following schedule:
|11:30am||Carbon Design Systems, “Addressing the Model Needs of the Virtual Platform Cycle”,
|12:00pm||SDV, “Bridging Abstraction Levels Between Transaction and Signal Level”, Bernard Deadman|
|12:30pm||CoFluent, “Automatic generation of SystemC IPs & use cases for Innovator from CoFluent Studio “
Jerome Lemaitre, Solution Specialist
|3:30pm||CoWare, “SystemC Standards Interoperability with CoWare: Get Value from Using–not Building–a Virtual Platform”, Tom De Schutter|
See you on the show floor!
Patrick Sheridan is responsible for Synopsys' system-level solution for virtual prototyping. In addition to his responsibilities at Synopsys, from 2005 through 2011 he served as the Executive Director of the Open SystemC Initiative (now part of the Accellera Systems Initiative). Mr. Sheridan has 30 years of experience in the marketing and business development of high technology hardware and software products for Silicon Valley companies.
Malte Doerper is responsible for driving the software oriented virtual prototyping business at Synopsys. Today he is based in Mountain View, California. Malte also spent over 7 years in Tokyo, Japan, where he led the customer facing program management practice for the Synopsys system-level products. Malte has over 12 years’ experiences in all aspects of system-level design ranging from research, engineering, product management and business development. Malte joined Synopsys through the CoWare acquisition, before CoWare he worked as researcher at the Institute for Integrated Signal Processing Systems at the Aachen University of Technology, Germany.
Tom De Schutter
Tom De Schutter is responsible for driving the physical prototyping business at Synopsys. He joined Synopsys through the acquisition of CoWare where he was the product marketing manager for transaction-level models. Tom has over 10 years of experience in system-level design through different marketing and engineering roles. Before joining the marketing team he led the transaction-level modeling team at CoWare.