The Standards Game

 

It’s true – I won’t be at DAC this year

For the first time in 20 years, I’m not going to DAC.  Really.

Instead, I will be in New Jersey, participating in IEEE Standards Association meetings which just happened to coincide with this year’s DAC.

Here are a few of the things I will miss at DAC:

Hanging out with my fellow bloggers in the Synopsys booth as they meet and greet their readers.

Working in the Synopsys standards booth #1541 which features VMM, IPL, and UPF.

Sunday

WORKSHOP: Design and Verification of Low Power SoCs: An Application Oriented Approach

Monday

WORKSHOP: Women in Design Automation: Networking, Negotiation, and Nonsense: Achieving Career Balance in an Unbalanced World

WORKSHOP: Introduction to Chips and EDA for a Non-technical Audience (to be taught by the dynamic Pamela McDaniel in my place)

LUNCH: Interoperable PDK Libraries: “The proof is in the pudding!”

PAVILION PANEL: Student design contest

RECEPTION: Synopsys/Sun university event

Tuesday

BREAKFAST: AMS Verification and Moore’s Law… solutions for 45nm and beyond.  

WORKSHOP: Effective Technical Writing

LUNCH: VMM User Forum: Methodology Beyond Base Classes

FORUM: Accellera Technical Committee Update and Technical Excellence Award

Playing Paula Abdul at the Denial (sic) Party.

Wednesday

BREAKFAST: Raiders of the Locked Art: Opening the Treasure with Interoperable PDK 

BREAKFAST: Accellera’s “Save Money Now! How to Reduce Costs, Complexity and Time to Market” 

LUNCH: Eclypse low power solution: First to Market with Differentiated Green-by-Design Electronic Consumer Products

Connecting with industry bloggers at the blogger Birds-of-a-Feather session.

 

Thursday

PAVILION PANEL: Negotiating a Successful Career  

Friday

TUTORIAL: Low power techniques for SoC design  

I’ll miss a lot of interesting events, good technical sessions, keynote speeches, and calories.  But most of all, I will miss seeing all of my colleagues and friends.

Have a wonderful DAC, everyone!





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