The Eyes Have It

New applications such as automotive are requiring different standards in the IP deliverables. There’s an interesting sea of change happening here, if you go back to the origins, some of the key suppliers to automotive were the steel and rubber industries – because that’s what the car was made of – which basically supported the long, […]

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Waiting for my flight from Tokyo to San Jose, I had a few minutes to think about the recent requirements for storage in mobile devices (think SELFIE), the increase in flash memory capacity using 3D technology and the most advanced memory protocol for flash. First, to set the scene, a quick re-cap on memory hierarchy. […]

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Next Thursday, September 17th  is TSMC’s ecosystem forum event (OIP – Open Innovation Platform) bringing together the EDA, IP and SoC community to present and discuss solutions to today’s design challenges. http://www.tsmc.com/english/newsEvents/events.htm This year, I will talk about the concept of “IP subsystems”. Below is the abstract of my talk. The vision of IP subsystems is […]

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Bluetooth has become the standard wireless interface for mobile devices like wearables, health monitors; it is also implemented in smart home and industrial applications. The requirement is to integrate the radio on your chip and because it’s a standard, you can think of it as IP.  Wireless IP. Some months ago, I was given the task […]

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In keeping with 50 years of Moore’s Law, this post is about the results we have obtained for 7-nm FinFET’s and 5-nm nano-wire standard cell logic libraries. These transistors are very new.  Trade-offs are being made by Synopsys’ device physicists in terms of electrostatics, leakage, patterning, manufacturability and transistor performance. Before I go any further […]

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For this post, I’m stepping out of the world of analog/mixed-signal IP to look at some of the challenges faced by the SoC (system on chip) developers when they are using IP. Firstly, the software content is increasing – in some cases almost half of the development budget of an SoC is spent on software […]

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Last week at VLSI Test Symposium (VTS) 2014, Synopsys presented “Fault Modeling and Test Algorithm Creation Strategy for FinFET-Based Memories” to a packed room of attendees with several standing, all interested in learning about memory Test for FinFET. FinFET transistors are playing an important role in advanced process technology nodes. Embedded memories based on FinFET […]

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PCI Express (PCIe) has long been a dominant standard for communications inside of computers, servers and blades but sometimes you need to think (and send data) outside the box. Since the first release of PCIe cabling standard in early 2007, creative engineers have been looking to utilize this new capability as a box-to-box interconnect, in […]

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Synopsys’ DesignWare® STAR Hierarchical System has been selected by EDN as a Best in Test 2014 Award Finalist. Every year, the Best-in-Test Awards recognize the best in test products and test professionals. STAR Hierarchical System (SHS) has been nominated for “Best in Test Award” in two categories: “Best in Test 2014 – Semiconductor Test” and […]

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Targetted for the next generation of digital televisions – known as “Ultra HDTV’s”; HDMI 2.0 has finally arrived after being in works for about 2 years by the broad group of companies in HDMI forum. The arrival of HDMI 2.0 is very timely for the wide rollout of this new generation of Ultra HDTVs. Since […]

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