Posted by Tom Borgstrom on April 6, 2009
This weekend I found myself telling my 9-year old daughter to “Eat all of your beans — don’t waste your food!” It has always bothered me to see perfectly good food get thrown away; these days it seems even more relevant. The same can be said about processor cores in verification.
About a year ago, Synopsys announced a corporate initiative to take advantage of multicore processor technology across its broad tool portfolio. On the verification front, the first tool out of the multicore gate was HSPICE, with impressive performance gains. What about Synopsys’ other verification tools?
Well, functional verification and FastSPICE tool users no longer have to suffer multicore-envy. Today, Synopsys announced its Discovery 2009 verification platform, including new VCS multicore technology and the new CustomSim unified circuit simulation solution with multicore capabilities.
This is a really big deal. Over the past few years, processor advances have come largely through multicore architectures rather than raw clock speeds, while the effort required for SoC verification has continued to grow exponentially. Improvements in single-core simulation algorithms, verification methodologies and use of compute farms have enabled large gains in verification productivity and will continue to do so. Multicore technology represents a fundamental and important new element of the verification toolkit, essential to taking advantage of the processing power available today and in the future.
So, with a nod to the new sense of thrift emerging in many households, you can do your part and take advantage of all of the cores in your workstation’s processor. “Use all of your cycles — don’t waste your cores!”
Who knows what the future will bring! After implementing neural networks in analog CMOS for my MSEE at Ohio State, I moved to Japan to do digital ASIC design using the new VHDL language and fancy logic synthesis technology from a startup called Synopsys. This introduced me to the wonderful world of EDA, where I was able to explore lots of other cool new technologies from test automation at CrossCheck to FPGA synthesis at Exemplar to code coverage at TransEDA to testbench automation and methodology at Synopsys. Twenty years flew by in the blink of an eye!
I am starting a new exploration around the bigger picture of what it takes to verify and validate increasingly complex designs on increasingly compressed schedules and budgets. This broad topic ranges from technology to economics, from embedded software development and architecture analysis to RTL and circuit design; from personal productivity to distributed team efficiency; from novel ideas to fundamental paradigm shifts; from historical perspectives to predictions of future requirements. Please join me and share your thoughts on verification!
- Tom Borgstrom