I want to share a video showing the work we are doing at Synopsys to help semiconductor vendors adopt the JEDEC UFS v1.1 standard needed for high performance storage applications. The video shows the Synopsys UFS Host solution connecting with the Toshiba UFS Device prototyping platform and operating a sequence of read and write commands. These commands are sent from the host to the device to store and fetch the data from on-board NVM using the UFS link. As you can expect we have done more comprehensive interoperability tests beyond that.
Mobile devices that use baseband processors and RFIC’s require a lot of effort to integrate these componenets together in a very challenging environment: small and slim board, tight casing, lots of RF components that may cause noise. Adding to that integrating new interface between the baseband processor and RFIC makes this integration work even more difficult. Synopsys can assist and reduce the integration risk and interface adoption easy for those who selects to integrate this kind of interface, namely the DigRFv4. Here’s a short video that demonstrates our integration effort with hardware prototyping system that emulates the baseband processor DigRFv4 interface and connects to Fujitsu RFIC hardware system.
I was approached by many readers asking for more information about integration of UFS in their SoC platform. As the information provided on the Synopsys MIPI web site gives you a good overview of the Synopsys UniPro controller and UFS Host controller it does not give you the high level view of what is delivered or what you need to integrate the Analog and Digital components in your SoC or storage IC. We have another resource for you, please reference this article: Building High-Performance Interfaces for Storage, Camera and Displays Using UniPro and UFS Controller IP which gives you an overview of our M-PHY, UniPro, UFS solutions, illustrating how they are used in a semiconductor environment and also provide some details about our FPGA prototyping platform to enable your system prototyping requirements.
JEDEC UFS (Universal Flash Storage) v1.1 is a standard promoted by JEDEC JC64.1 aiming to replace eMMC for scalable and high performance non-volatile memory interface in mobile and consumer electronics. The same JEDEC JC64.1 is the group that develops eMMC meaning that they see the transition from eMMC to UFS and are prepared to that. It’s fair to assume that UFS will be used in high end mobile applications first like high end smartphones, tablets and Ultrabooks and compete with eMMC on some of the lower end applications. Long term and assuming high volume manufacturing reduces UFS device costs we will see UFS replacing eMMC but there is a long way to go until we reach that time.
The world continues to change in front of our eyes. The things that were considered essential a decade ago are now obsolete. Latest research from Virgin Media Business suggests that Landline phones in offices will be replaced by smartphones. The research says that 65% of the Chief Information Officers interviewed said that the desk telephone is likely to become redundant while the dominance of smartphone grows. Furthermore, 62% of the CIO’s that were interviewed pointed out that also desktop computers are the next item to disappear from the office.
I cover topics about low power and mobile applications in the past years but there is something that is often neglected. It comes at the expense of lowering the power and it is performance. We can argue that minimizing power consumption is dependent on what kind of power we’re reducing (for example static or leakage vs. dynamic power) and its effect of the performance but we know that there is no void in physics and Higher Voltage threshold for example reduces leakgae but affects max performance. The problem we have is that as much as we need lower leakage power and lower dynamic power to prolonge the battery life between charges, we also need high performance as we don’t want to wait for an application to load itself or transfer data to our mobile device. As part of my role I track the operating performance of Image sensors and Displays and one of the good measurements is the maximum bandwidth used by the camera interface CSI-2 and display interface DSI. I discussed this with David Wolfe (reference my interview with David here) and he provided me some statistics observed as part conducting interoeprability events in the past years.
We participated at Mobile Expo as part of the MIPI alliance booth and had hardware demonstration showing our complete and interoperable CSI-2 and DSI host interfaces.
I wanted to make a few points about why you should think of implementing LLI (and M-PHY) in your next design. But first, I want to invite you to a live webinar conducted by Synopsys and Arteris that will explain the implementation and best practices when implementing LLI.