On The Move

 

Next-generation mobile protocols foundation

The M-PHY is the second generation physical layer protocol from the MIPI® Alliance (www.mipi.org) and serves as the foundation of many chip-to-chip protocols such as DigRFv4, CSI-3, DSI-2, LLI and UFS targeted to be used in mobile electronics.
The current MIPI alliance physical layer (PHY) used in Camera and Display serial interfaces (CSI2 and DSI) is the D-PHY. The D-PHY is a source-synchronous high speed serial PHY allowing up to 4Gbps in aggregate data. The D-PHY is a good fit for low power high speed camera and display interfaces however it has limited total bandwidth and cannot meet all requirements expected in future mobile electronics chip-to-chip connectivity. The second-generation PHY for future mobile electronics connectivity is the M-PHY which was defined by the MIPI alliance PHY Working Group (http://mipi.org/working-groups/phy) to enable scalable, low power, low EMI emission, high speed interface for chip-to-chip connectivity.
Here are some of the differences between D-PHY and M-PHY courtesy of the MIPI Alliance:

Features comparison D-PHY vs. M-PHY

The first protocol that is driving the need in M-PHY is DigRFv4 which is the de-facto chip-to-chip standard between Baseband processor and RFIC. The DigRFv4 interface is a high speed, serial, chip to chip interface enabling increased reliability, lower power, lower pin count and increased interoperability.
To help semiconductor vendors adopt the DigRFv4 protocol, meet power and area constraints, time to market needs and reduce risk, design engineers need access to available M-PHY design. Unless developed internally, the availability is critical to even consider using the specification. Availability coupled with robustness of IP enable the adoption of the specification in existing design and not pushing the implementation to the next project. The robustness could mean many things: having silicon proven fully characterized IP, fully verified PHY and controller operation, and interoperability with common device ICs to deliver a system proven solution.
Here’s a demonstration of a fully-characterized silicon-proven M-PHY solution from Synopsys:

A robust M-PHY architecture that can withstand process, voltage and temperature variations enables adoption of the technology by design engineers to be used in upcoming semiconductor designs. The DigRFv4 protocol is the first protocol driving the rapid adoption of M-PHY and additional protocols will follow and use the M-PHY as the base architecture.

MIPI® Alliance is a registered trademark of MIPI Alliance, Inc.

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