Why is Low Power Based Optimization more challenging for the tools

My apologies for changing the title of my previous post. I realized that most of the optimization challenges are primarily due to the design requirements not UPF requirements. UPF is just a medium to define power intent, similar to verilog defining the logic intent of the design.

continuing on the same topic, few more reasons, which makes optimization challenging are

Isolation cells, isolating off/on blocks need to be placed closer to source if the isolation cell used is a single rail cell and its residing domain is different than the source/sink domain. This ensures that the signal is isolated properly to reach the sink. Scenario changes if the isolation cells used are dual rail isolation cell.
During scan mode, all the special cells should be directly controllable and observable . This puts restriction on how tools can handle scan chain. This can also lead to scan chain re-ordering locally.
Global signal distribution need to be power aware.. This leads to proper usage of AON buffers and regular buffers depending on how the global signal traverses.
Physically each power domain/island/voltage area can restrict the routing of the signals, which might lead to taking longer route to reach destination. Due to these longer routes, more buffers/inverters/logic may be required to fix transition/timing/si requirements.

Why is Low Power Based Optimization more challenging for the tools

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