Posted by Godwin Maben on September 10, 2009
I quite often get this question, my design used to work fine , P&R tools did not have any issues and was routed clean and so was LVS . But the same design, targeted towards reducing power leads to undesirable results and not at all clean?
Now lets look at some of the challenges faced by the optimization tools, when power domains are introduced through UPF? Other thing to keep in mind is power is no longer an after thought process anymore, designs need to be well architected up-front to avoid certain issues stated above!
(1) Physical optimization during placement is constrained to ensure that cells in a power domain are placed inside the island(voltage area). This requires hard exclusive region constraints applied to the cells in the power domain during the placement and physical aware optimization process. It also requires tools to keep track of logical hierarchies as netlist is being modified, all the physical optimization need to align itself with the logical hierarchies and insert the new cells in the respective hierarchies, else we end up having AON cells in dead region and vice-versa
(2) New cells created during re-structuring logic or local buffering in a power domain must be assigned to the power island and constrained to ensure that they are placed inside the respective island.
(3) Short feed-through paths in a power island should be protected from buffer insertion during design optimization and design-rule fixing to maintain wire connection(inserting buffers and the entry point of the island and exit point of the island). Long feed-through paths that need repeaters must be buffered by always-on buffers so that the feed-through paths are functional while the island is powered down.
(4) Special cells such as Level Shifter/Isolation Cells….etc, have their respective places physically(pre-defined) to avoid electrical issues and should be honored through out the optimization process.
…more in my next post.
- Godwin Maben