Magic Blue Smoke


Low Power Sessions at SNUG San Jose 2009

Finally got a chance to attend some of the sessions related to Power at SNUG this year. Could catch up with some of my very old friends as well.

I found  following tutorial on UPF, presented by Synopsys CAE’s very informative, which was pretty good for some one, who are new to UPF and its implications on the flow.

Multi-Voltage Implementation Methodology Using UPF and also the following tutorial by David Flynn on Power Gating

Design for Power Gating – And What UPF Can, and Cannot, Do for You


Following are links to other interesting papers on Power.

Low Power Verification Methodology For DSP Core using SVTB

Power and Signal Reliability Using HSIMPlus

A Predictable Approach to Reducing Clock-Tree Power using IC Compiler Low-Power CTS

Automated Design Flow for Reducing Power in a High Performance Synthesizable Processor Core

Leakage Power Optimization : An Improved Synthesis Methodology

Using ESP-CV for Dynamic Power Analysis of Custom Macros to Reduce Analysis Time and Improve Accuracy

Hierarchical UPF Flow Case Study

Achieve Higher Performance and Lower Power Consumption for Mass Storage Designs with SATA Device IP

Galaxy Test: Power-Aware DFT/ATPG and Technical Updates


Note: You need to have solvnet userid to access any of these documents.