Today let’s look at the various structural errors or bugs that can be really destructive for any MV design. Structural error is a bug, which is caused either by, the way RTL is written or implementation tools interpreting the power intent incorrectly. These can be further classified as structural errors leading to electrical violations or structural errors leading to pure functional failures. Given below are some of them
Its been quite some time since I blogged , I was on a vacation for last 3-4 weeks. Nice to be back again.
Posted in low power general | Comments Off on Low Power Verification
Based on my interactions with many designers for the past few years, most common techniques in practice/proven today are
Posted in low power general | Comments Off on Polling Low Power Design Styles
last week we saw physical structure of LS/ISO cells. Today lets look at
Today let me give a quick insight into various special cells and their physical structure
Posted in Infrastructure | Comments Off on Physical Structure of Special Cells
Often times I get questions on how to write an UPF describing the varying nature of Voltage in a DVFS design. I will try to explain how this can be done at a very higher level. If any one of you have any specific question please let me know so that I can elaborate on that.
Posted in low power general | Comments Off on Writing UPF for a DVFS design
Hello all, My apologies for being inactive for last 4 weeks, I was bit busy. As per many request, here is a sample synthesis script for UPF flow……
Posted in low power general | Comments Off on UPF Synthesis Script
Based on earlier feedback, lets take a quick look at functional power state table and see how we can convert this into UPF state Table
Posted in Power Format | Comments Off on Power State Table Creation in UPF
So far we have seen how UPF gets interpreted during synthesis and verification . Today lets look at how UPF gets interpreted during Floorplanning/Power Planning ? This is the most important phase in the design cycle, where power grid required for the design gets implemented physically to get the required functionality.
Posted in Power Format | Comments Off on Interpretation of UPF during Power Planning
Based on comments and feedback, I am posting the RTL as well as the UPF for this RTL. The Power Intent Diagram for this Designs is as shown Below