Posted by Godwin Maben on October 9, 2007
I was in discussion with a designer other day on “Impact on performance of the design if the voltage range is not choosen correctly”, today I am going elaborate a bit on this topic.
While designing the system with DVFS techniques, we need to look at the impact of temperature inversion on the performance of the design.While selecting the voltages and frequencies for the design, one must consider the range such that delay/voltage consistently either increase or decrease. What this means is we must always operate above the temperature inversion point.
Especially in low power UDSM process combined use of reduced VDD and High Threshold voltage may greatly modify the temperature sensitiveness of the design. Due to this worst case timing is no longer guaranteed at highest temperature.So in order to guarantee the correct behaviour of the design, one has to verify the design at various PVT conditions. This leads to increase in the total turn around time.
In a nutshell, Normally delay increases with increase in temperature, but below a certain voltage, this relationship inverts and delay starts to decrease with increase in temperature. This is a function of threshold voltage(Threshold voltage and carrier mobility are temperature dependent). Due to this threshold voltage dependence, we have observed that non-critcal paths suddenly become critical.
Having said this as soon as Voltage/Delay relate randomly Voltage Scaling becomes a nightmare to implement and verify
Note: If both threshold voltage and carrier mobility monotonically decrease with increase in temperature, Operating Voltages(range) defines the performance of the design.
- Godwin Maben