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Xiaolin Chen


Xiaolin Chen has been working at Synopsys for 15 years on application of formal technology in verification, working with customers to explore opportunities where formal technology can be best suited to solve verification problems. She provides guidance, training, and assistance to customers as well as Synopsys field and design teams in developing formal verification environment.

Posts by Xiaolin Chen:


World Cup Champion and Formal Verification at DAC 2018

What an exciting World Cup 2018! The whole world was glued to the television. People were rooting for their favorite teams and in awe of the skills demonstrated by many players. The spirit of World Cup reminds of this year’s DAC event, just a few weeks ago.

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Posted in Events |


Mutation superpower in formal model checking? You betcha!

We have been fascinated with the stories of superheroes from X-Men. Who is not impressed with the power of mutation capability of the superheroes?   The stories really hit it big when Hollywood became interested in the mid-1990s.  Coincidentally, just around the same time formal model checking started to get attention in hardware verification.  In those early days, it seemed only people with “superpower” (i.e. PhD in formal verification) knew how to navigate the technology to fully verify and signoff functionality of a design block.   It has been a long time since the early days and many new capabilities have emerged to make formal verification easier to do.  So, how do people without “superpower” verify and signoff functional verification of design blocks using formal? And do so with absolute confidence?

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Posted in Formal Methodology, Property Verification |