InFormal Chat

Archive for 2018

 

21st Century Power SEQers

Power consumption has been an important consideration for IC designs for a while now. Mobile devices today are more powerful than they’ve ever been. I can stream movies, order food, get turn by turn directions and take incredible quality photos and videos using a single device in my pocket… So long as I can make it to the end of the day without the battery running flat. Nobody wants to be in the middle of an important email when the screen suddenly goes black and I’m pretty sure I’m not the only one who’s gone diving into a coffee shop seeking power outlets because of it! These days, we all live with a small amount of power anxiety and 6th sense for hunting down USB sockets and power sources. Combine this with the huge number of servers out there burning power and it’s no surprise that most modern designers are always looking to find that delicate balance of power and performance.

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Posted in Formal Equivalence | Comments Off on 21st Century Power SEQers

 

You don’t have to take my word for it: Machine Learning has a place in Formal Verification

Just over a year ago I wrote a blog about the impact of machine learning (ML) algorithms to boost Formal Verification performance . The data for that blog was firsthand experience on a set of complex benchmarks. The data was amazing and quite convincing, but when I wrote that blog the reader needed to “trust” me as the data could not be shared publicly.

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Posted in Automation, Property Verification | Comments Off on You don’t have to take my word for it: Machine Learning has a place in Formal Verification

 

World Cup Champion and Formal Verification at DAC 2018

What an exciting World Cup 2018! The whole world was glued to the television. People were rooting for their favorite teams and in awe of the skills demonstrated by many players. The spirit of World Cup reminds of this year’s DAC event, just a few weeks ago.

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Posted in Events | Comments Off on World Cup Champion and Formal Verification at DAC 2018

 

Managing Initial State to Head Start Formal Verification

Wouldn’t it be nice to get a head start on some things in life? How great would it be to just be able to walk straight to the front of any queue you find yourself in? For me, I’d like a head start on those long flights from the UK to California. If I could start them somewhere over the Rocky Mountains, then it would be a much more pleasant journey… aside from the mountain waves turbulence! While money, fame or just downright rudeness can potentially get you to the front of a queue, I’m going to have to wait for someone to invent teleportation to cut down that journey time.

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Posted in Formal Methodology, Property Verification | Comments Off on Managing Initial State to Head Start Formal Verification

 

Artificial Intelligence, let us get the math right first!

Artificial intelligence is a hot topic these days and therefore doesn’t require a repeat of the current and future potential uses for AI. For most people it means technology advancements on the software side but If you ask people who are very close to this technology domain, building your own optimized hardware chips is where significant part of the competitive edge lies.

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Posted in Formal Methodology, Introduction | Comments Off on Artificial Intelligence, let us get the math right first!

 

Formal Verification Showcase – DVCon 2018 and SNUG Silicon Valley 2018

It should not be news to the readers that Formal verification is an integral part of verification flows for the majority of leading edge SoC design and IP companies. A good indicator for this is the amount of papers, posters and tutorials presented at recent industry events/conferences in Silicon Valley.

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Posted in Events | Comments Off on Formal Verification Showcase – DVCon 2018 and SNUG Silicon Valley 2018

 

Don’t have a Meltdown over a Spectre in your SoC

You may be concerned about the widely published Spectre and Meltdown vulnerabilities affecting most processors, and if your phone and computer are OK. Or more importantly, if you are designing or verifying SoCs, do you have a specter in your design? Let’s first look at what these two vulnerabilities are and how they are affecting your system.

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Posted in Automation, Formal Methodology, Property Verification | Comments Off on Don’t have a Meltdown over a Spectre in your SoC

 

Deep or Broad : Let’s settle this once and for all!

Have you ever witnessed two passionate industry experts debate fundamental approaches of verification? They bring their decades of experience, hundreds of bugs uncovered, and countless successes and failures in order to establish intellectual dominance. Unfortunately, for most of us, the observers, these debates are usually prematurely interrupted by a reality check: a pointy-haired manager who urges them to “take it offline” or we all get “kicked out” of a conference room.

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Posted in Events, Uncategorized | Comments Off on Deep or Broad : Let’s settle this once and for all!

 

Corner case bugs – Formal got you covered

Imagine the scene. It’s Friday night, and you’ve decided to relax and watch a movie. Given the overwhelming amount of choices, you’ve already spent over an hour watching trailers to choose the movie and you’re finally almost ready to go. All that’s left is the popcorn. You go over to the microwave and get it going. For a little while nothing happens, but then you start to hear the pops, slowly at first but then much more rapidly before beginning to taper off. You then have to ask yourself: When do I stop? This is a big question. Take it out too soon and you’re going to break your teeth on those unpopped kernels. Leave it in too long and you risk burning it. How can you know if its popped long enough?

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Posted in Formal Methodology, Introduction, Property Verification | Comments Off on Corner case bugs – Formal got you covered

 

DVCon 2018 Tutorial – The Magic of Formal Revealed

We have all witnessed many magic tricks that seem to perform the impossible. How did he guess my number? Where did that rabbit come from? How did she survive getting sawed in two? Without knowing the tricks of the trade, it is very hard for you and I to reproduce such magic.

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Posted in Events, Formal Methodology, Introduction, Property Verification | Comments Off on DVCon 2018 Tutorial – The Magic of Formal Revealed