InFormal Chat

Corner case bugs – Formal got you covered

Imagine the scene. It’s Friday night, and you’ve decided to relax and watch a movie. Given the overwhelming amount of choices, you’ve already spent over an hour watching trailers to choose the movie and you’re finally almost ready to go. All that’s left is the popcorn. You go over to the microwave and get it […]

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DVCon 2018 Tutorial – The Magic of Formal Revealed

We have all witnessed many magic tricks that seem to perform the impossible. How did he guess my number? Where did that rabbit come from? How did she survive getting sawed in two? Without knowing the tricks of the trade, it is very hard for you and I to reproduce such magic. The same holds […]

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Divide and Conquer – Formal for Large Designs

As we have discussed in several of the blogs on this forum, successful deployment of Formal verification requires knowing where and how to use it. Building up an arsenal of techniques that can be applied to deal with complexity and knowing how to use them safely is a necessity for every expert Formal engineer. So […]

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Interconnect Traffic Jam on your SoC

Interconnect on a System on Chip (SoC) is like the road network. There is a lot of it but it still doesn’t go everywhere and traffic jams mean that even if there is a road, you may not be able to get to your destination. On an SoC, just because there is a wire doesn’t […]

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Tearless Formal Verification

Cooking can be a necessity, hobby or calming therapy depending on whom you talk to. Personally speaking, I cook occasionally but even when I am not cooking and I am just a mere silent admirer of this amazing process, onion peeling/cutting/chopping brings tears to my eyes 😀 There are few tricks that one could use to […]

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The organic growth of Formal verification

I recently returned from a very exciting Asia trip where I took the opportunity to visit some of our customers. While I made the mistake of combining too many cities in too few days and had to deal with a stubborn Typhoon that did not respect my aggressive travel plan; I noticed a significant change […]

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Driven to Abstraction

Someday, in the not too distant future, I will be able to fall asleep, play computer games or write a bestselling novel at the wheel (well 2/3 isn’t bad). Until such time however, I have just the one option – concentrate deeply and blast the speakers with my classic rock and punk collection. In the […]

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“Phalanx” – Greek warfare strategy for Formal Property Verification

When running Formal Property Verification, we often see goals that are neither proven nor failing (especially on complex properties), which implies inconclusive goals, also referred to as bounded proofs. In these scenarios, what we have at hand is the Formal bounded depth (in terms of clock cycles), associated with such inconclusive properties. As hard working […]

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The Formal Man-vs-Machine Showdown

It is commonly believed that Formal property verification is the realm of PhDs and experts with many years of experience and have the magical solution and intellect to solve complex verification problems. I see the application of Formal verification solutions solving design bugs very much like the way supercomputers and artificial intelligence have evolved to beat […]

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DAC 2017 Review: Exotic Formal Applications

As I wrote in previous blog “DAC 2017 -Feels Like a Formal Candy Store”, I was expecting a lot of interesting presentations on Formal applications at DAC. Not only did I find some sweet Formal presentations but also some pretty exotic Formal applications. It is clear that there is a lot of usage of Formal tools […]

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