Explore Arm’s SystemReady program, and learn how we’re simplifying hardware/software compliance through pre-silicon testing for Base System Architecture (BSA).
Posted in IP, Verification
Explore the challenges of static linting of code and learn how static linting tools speed up the ASIC development process for faster chip design signoff.
Posted in Verification
Physical verification is critical for complex chip designs, learn how our AWS-powered IC Validator saves time in EDA workloads such as design rule checking.
Posted in Cloud, Customer Spotlight, EDA, Verification
We explore the importance of cloud security in cloud-based chip design and verification, and unpack the key pillars of security in our cloud EDA tools.
Posted in Cloud, EDA, IP, Security, Verification
Learn how our PrimeSim circuit simulation tools leverage NVIDIA A100 GPUs for advanced performance scaling, accelerating circuit simulation runtime by 10x.
Posted in Customer Spotlight, EDA, Product Spotlight, Verification
We explain the impact of Reset Domain Crossing (RDC) on ASIC design, and how chip design verification solutions help achieve pre-silicon RDC signoff.
Posted in Verification
Learn how AI-enabled system debug tools accelerate the pre-silicon chip debug process and reduce SoC verification time to shorten chip design turnaround.
Posted in Verification
5G SoC design is powered by virtual chip verification tools; explore our partnership w/ Keysight and how it accelerates 5G rollout for 5G systems manufacturers.
Posted in 5G, Verification
We’re looking back at 2021’s breakthroughs & milestones; explore key developments in EDA tools, SoC verification, connected vehicles, and life at Synopsys.
Posted in 3D-ICs, Automotive, EDA, HPC, Inside Synopsys, IP, Prototyping, Quantum Computing, Verification
We explain clock domain crossing & common challenges faced during the ASIC design flow as chip designers scale up CDC verification for multi-billion-gate ASICs.
Posted in Verification
