From Silicon To Software

Archive for the 'Verification' Category

 

Collaborating to Ensure that Software Just Works Across Arm-Based Hardware

Explore Arm’s SystemReady program, and learn how we’re simplifying hardware/software compliance through pre-silicon testing for Base System Architecture (BSA).

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Posted in IP, Verification

 

Integration Challenges for Multi-Billion Gate ASICs: Part 3 – Static Linting

Explore the challenges of static linting of code and learn how static linting tools speed up the ASIC development process for faster chip design signoff.

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Posted in Verification

 

Saving Time and Optimizing Resource Usage for Physical Verification

Physical verification is critical for complex chip designs, learn how our AWS-powered IC Validator saves time in EDA workloads such as design rule checking.

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Posted in Cloud, Customer Spotlight, EDA, Verification

 

Robust Security for Cloud-Based Chip Design and Verification

We explore the importance of cloud security in cloud-based chip design and verification, and unpack the key pillars of security in our cloud EDA tools.

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Posted in Cloud, EDA, IP, Security, Verification

 

Customer Spotlight: Synopsys PrimeSim Circuit Simulation Improvements with NVIDIA A100 GPUs

Learn how our PrimeSim circuit simulation tools leverage NVIDIA A100 GPUs for advanced performance scaling, accelerating circuit simulation runtime by 10x.

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Posted in Customer Spotlight, EDA, Product Spotlight, Verification

 

Integration Challenges for Multi-Billion Gate ASICs: Part 2 – Reset Domain Crossing

We explain the impact of Reset Domain Crossing (RDC) on ASIC design, and how chip design verification solutions help achieve pre-silicon RDC signoff.

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Posted in Verification

 

How Do You Solve the Chip Debug Challenge in Verification?

Learn how AI-enabled system debug tools accelerate the pre-silicon chip debug process and reduce SoC verification time to shorten chip design turnaround.

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Posted in Verification

 

5G SoC Design: Why You Need Fast, Thorough Chip-Level Testing

5G SoC design is powered by virtual chip verification tools; explore our partnership w/ Keysight and how it accelerates 5G rollout for 5G systems manufacturers.

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Posted in 5G, Verification

 

A Year in Review: A Recap of Key Milestones and Moments in 2021

We’re looking back at 2021’s breakthroughs & milestones; explore key developments in EDA tools, SoC verification, connected vehicles, and life at Synopsys.

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Posted in 3D-ICs, Automotive, EDA, HPC, Inside Synopsys, IP, Prototyping, Quantum Computing, Verification

 

Integration Challenges for Multi-Billion-Gate ASICs: Part 1 – Clock Domain Crossing

We explain clock domain crossing & common challenges faced during the ASIC design flow as chip designers scale up CDC verification for multi-billion-gate ASICs.

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Posted in Verification